Add the required definitions for the USB OTG interface. Signed-off-by: Steve Rae <s...@broadcom.com> ---
arch/arm/include/asm/arch-bcm281xx/sysmap.h | 141 ++++++++++++++++++++++++++++ 1 file changed, 141 insertions(+) diff --git a/arch/arm/include/asm/arch-bcm281xx/sysmap.h b/arch/arm/include/asm/arch-bcm281xx/sysmap.h index 93ebf34..69f0fb9 100644 --- a/arch/arm/include/asm/arch-bcm281xx/sysmap.h +++ b/arch/arm/include/asm/arch-bcm281xx/sysmap.h @@ -27,4 +27,145 @@ #define SECWD2_BASE_ADDR 0x35002f40 #define TIMER_BASE_ADDR 0x3e00d000 +#define HSOTG_OTGCTL_OFFSET 0x00000000 +#define HSOTG_OTGCTL_SESREQ_MASK 0x00000002 +#define HSOTG_OTGINT_OFFSET 0x00000004 +#define HSOTG_OTGINT_DBNCEDONE_MASK 0x00080000 +#define HSOTG_OTGINT_ADEVTOUTCHG_MASK 0x00040000 +#define HSOTG_OTGINT_SESREQSUCSTSCHNG_MASK 0x00000100 +#define HSOTG_OTGINT_SESENDDET_MASK 0x00000004 +#define HSOTG_AHBCFG_OFFSET 0x00000008 +#define HSOTG_AHBCFG_NPTXFEMPLVL_MASK 0x00000080 +#define HSOTG_AHBCFG_DMAEN_MASK 0x00000020 +#define HSOTG_AHBCFG_GLBLINTRMSK_MASK 0x00000001 +#define HSOTG_CFG_OFFSET 0x0000000C +#define HSOTG_CFG_USBTRDTIM_SHIFT 10 +#define HSOTG_CFG_HNPCAP_MASK 0x00000200 +#define HSOTG_CFG_SRPCAP_MASK 0x00000100 +#define HSOTG_CFG_ULPI_UTMI_SEL_MASK 0x00000010 +#define HSOTG_RSTCTL_OFFSET 0x00000010 +#define HSOTG_RSTCTL_AHBIDLE_MASK 0x80000000 +#define HSOTG_RSTCTL_CSFTRST_MASK 0x00000001 +#define HSOTG_INTSTS_OFFSET 0x00000014 +#define HSOTG_INTSTS_WKUPINT_MASK 0x80000000 +#define HSOTG_INTSTS_OEPINT_MASK 0x00080000 +#define HSOTG_INTSTS_IEPINT_MASK 0x00040000 +#define HSOTG_INTSTS_ENUMDONE_MASK 0x00002000 +#define HSOTG_INTSTS_USBSUSP_MASK 0x00000800 +#define HSOTG_INTSTS_ERLYSUSP_MASK 0x00000400 +#define HSOTG_INTSTS_OTGINT_MASK 0x00000004 +#define HSOTG_INTSTS_CURMOD_MASK 0x00000001 +#define HSOTG_INTMSK_OFFSET 0x00000018 +#define HSOTG_INTMSK_WKUPINTMSK_MASK 0x80000000 +#define HSOTG_INTMSK_DISCONNINTMSK_MASK 0x20000000 +#define HSOTG_INTMSK_OEPINTMSK_MASK 0x00080000 +#define HSOTG_INTMSK_INEPINTMSK_MASK 0x00040000 +#define HSOTG_INTMSK_ENUMDONEMSK_MASK 0x00002000 +#define HSOTG_INTMSK_USBRSTMSK_MASK 0x00001000 +#define HSOTG_INTMSK_USBSUSPMSK_MASK 0x00000800 +#define HSOTG_INTMSK_ERLYSUSPMSK_MASK 0x00000400 +#define HSOTG_INTMSK_OTGINTMSK_MASK 0x00000004 +#define HSOTG_RXFSIZ_OFFSET 0x00000024 +#define HSOTG_RXFSIZ_RXFDEP_SHIFT 0 +#define HSOTG_NPTXFSIZ_OFFSET 0x00000028 +#define HSOTG_NPTXFSIZ_NPTXFDEP_SHIFT 16 +#define HSOTG_NPTXFSIZ_NPTXFSTADDR_SHIFT 0 +#define HSOTG_DIEPTXF1_OFFSET 0x00000104 +#define HSOTG_DIEPTXF1_INEPNTXFDEP_SHIFT 16 +#define HSOTG_DIEPTXF1_INEPNTXFSTADDR_SHIFT 0 +#define HSOTG_DCFG_OFFSET 0x00000800 +#define HSOTG_DCFG_EPMISCNT_SHIFT 18 +#define HSOTG_DCFG_PERFRINT_SHIFT 11 +#define HSOTG_DCFG_DEVADDR_SHIFT 4 +#define HSOTG_DCTL_OFFSET 0x00000804 +#define HSOTG_DCTL_TSTCTL_MASK 0x00000070 +#define HSOTG_DCTL_SFTDISCON_MASK 0x00000002 +#define HSOTG_DSTS_OFFSET 0x00000808 +#define HSOTG_DSTS_ENUMSPD_SHIFT 1 +#define HSOTG_DSTS_ENUMSPD_MASK 0x00000006 +#define HSOTG_DIEPMSK_OFFSET 0x00000810 +#define HSOTG_DIEPMSK_TIMEOUTMSK_MASK 0x00000008 +#define HSOTG_DIEPMSK_AHBERRMSK_MASK 0x00000004 +#define HSOTG_DIEPMSK_EPDISBLDMSK_MASK 0x00000002 +#define HSOTG_DIEPMSK_XFERCOMPLMSK_MASK 0x00000001 +#define HSOTG_DOEPMSK_OFFSET 0x00000814 +#define HSOTG_DOEPMSK_SETUPMSK_MASK 0x00000008 +#define HSOTG_DOEPMSK_AHBERRMSK_MASK 0x00000004 +#define HSOTG_DOEPMSK_EPDISBLDMSK_MASK 0x00000002 +#define HSOTG_DOEPMSK_XFERCOMPLMSK_MASK 0x00000001 +#define HSOTG_DAINT_OFFSET 0x00000818 +#define HSOTG_DAINTMSK_OFFSET 0x0000081C +#define HSOTG_DAINTMSK_OUTEPMSK_SHIFT 16 +#define HSOTG_DAINTMSK_INEPMSK_SHIFT 0 +#define HSOTG_DIEPCTL0_OFFSET 0x00000900 +#define HSOTG_DIEPCTL0_EPENA_MASK 0x80000000 +#define HSOTG_DIEPCTL0_CNAK_MASK 0x04000000 +#define HSOTG_DIEPCTL0_STALL_MASK 0x00200000 +#define HSOTG_DIEPCTL0_USBACTEP_MASK 0x00008000 +#define HSOTG_DIEPCTL0_NEXTEP_SHIFT 11 +#define HSOTG_DIEPINT0_OFFSET 0x00000908 +#define HSOTG_DIEPTSIZ0_OFFSET 0x00000910 +#define HSOTG_DIEPTSIZ0_PKTCNT_SHIFT 19 +#define HSOTG_DIEPTSIZ0_XFERSIZE_SHIFT 0 +#define HSOTG_DIEPDMA0_OFFSET 0x00000914 +#define HSOTG_DIEPCTL1_OFFSET 0x00000920 +#define HSOTG_DIEPCTL1_EPENA_SHIFT 31 +#define HSOTG_DIEPCTL1_CNAK_SHIFT 26 +#define HSOTG_DIEPCTL1_TXFNUM_SHIFT 22 +#define HSOTG_DIEPCTL1_EPTYPE_SHIFT 18 +#define HSOTG_DIEPCTL1_USBACTEP_SHIFT 15 +#define HSOTG_DIEPCTL1_NEXTEP_SHIFT 11 +#define HSOTG_DIEPCTL1_MPS_SHIFT 0 +#define HSOTG_DIEPINT1_OFFSET 0x00000928 +#define HSOTG_DIEPTSIZ1_OFFSET 0x00000930 +#define HSOTG_DIEPTSIZ1_PKTCNT_SHIFT 19 +#define HSOTG_DIEPTSIZ1_XFERSIZE_SHIFT 0 +#define HSOTG_DIEPDMA1_OFFSET 0x00000934 +#define HSOTG_DOEPCTL0_OFFSET 0x00000B00 +#define HSOTG_DOEPCTL0_EPENA_MASK 0x80000000 +#define HSOTG_DOEPCTL0_CNAK_MASK 0x04000000 +#define HSOTG_DOEPINT0_OFFSET 0x00000B08 +#define HSOTG_DOEPINT0_TIMEOUT_MASK 0x00000008 +#define HSOTG_DOEPINT0_XFERCOMPL_MASK 0x00000001 +#define HSOTG_DOEPTSIZ0_OFFSET 0x00000B10 +#define HSOTG_DOEPTSIZ0_SUPCNT_SHIFT 29 +#define HSOTG_DOEPTSIZ0_PKTCNT_SHIFT 19 +#define HSOTG_DOEPTSIZ0_XFERSIZE_SHIFT 0 +#define HSOTG_DOEPDMA0_OFFSET 0x00000B14 +#define HSOTG_DOEPCTL1_OFFSET 0x00000B20 +#define HSOTG_DOEPCTL1_EPENA_SHIFT 31 +#define HSOTG_DOEPCTL1_CNAK_SHIFT 26 +#define HSOTG_DOEPCTL1_EPTYPE_SHIFT 18 +#define HSOTG_DOEPCTL1_USBACTEP_SHIFT 15 +#define HSOTG_DOEPCTL1_MPS_SHIFT 0 +#define HSOTG_DOEPINT1_OFFSET 0x00000B28 +#define HSOTG_DOEPINT1_TIMEOUT_MASK 0x00000008 +#define HSOTG_DOEPINT1_XFERCOMPL_MASK 0x00000001 +#define HSOTG_DOEPTSIZ1_OFFSET 0x00000B30 +#define HSOTG_DOEPTSIZ1_PKTCNT_SHIFT 19 +#define HSOTG_DOEPTSIZ1_XFERSIZE_SHIFT 0 +#define HSOTG_DOEPTSIZ1_XFERSIZE_MASK 0x0007FFFF +#define HSOTG_DOEPDMA1_OFFSET 0x00000B34 +#define HSOTG_PCGCR_OFFSET 0x00000E00 +#define HSOTG_PCGCR_STOPPCLK_SHIFT 0 + +#define HSOTG_CTRL_USBOTGCONTROL_OFFSET 0x00000000 +#define HSOTG_CTRL_USBOTGCONTROL_REG_OTGSTAT2_MASK 0x20000000 +#define HSOTG_CTRL_USBOTGCONTROL_REG_OTGSTAT1_MASK 0x10000000 +#define HSOTG_CTRL_USBOTGCONTROL_OTGSTAT_CTRL_MASK 0x08000000 +#define HSOTG_CTRL_USBOTGCONTROL_UTMIOTG_IDDIG_SW_MASK 0x04000000 +#define HSOTG_CTRL_USBOTGCONTROL_USB_HCLK_EN_DIRECT_MASK 0x00020000 +#define HSOTG_CTRL_USBOTGCONTROL_USB_ON_IS_HCLK_EN_MASK 0x00010000 +#define HSOTG_CTRL_USBOTGCONTROL_USB_ON_MASK 0x00008000 +#define HSOTG_CTRL_PHY_P1CTL_OFFSET 0x00000008 +#define HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK 0x00000002 +#define HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK 0x00000001 +#define HSOTG_CTRL_BC_STATUS_OFFSET 0x0000000C +#define HSOTG_CTRL_BC_STATUS_SDP_MASK 0x00000001 +#define HSOTG_CTRL_BC_CFG_OFFSET 0x00000010 +#define HSOTG_CTRL_BC_CFG_BC_OVWR_KEY_MASK 0xFFFE0000 +#define HSOTG_CTRL_BC_CFG_SW_OVWR_EN_MASK 0x00010000 +#define HSOTG_CTRL_BC_CFG_BC_OVWR_SET_M0_MASK 0x00000002 +#define HSOTG_CTRL_BC_CFG_BC_OVWR_SET_P0_MASK 0x00000001 + #endif -- 1.8.5 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
