Hi Felix,
On Monday 22 June 2009 13:08:17 Felix Radensky wrote:
> This patch fixes 2 problems with FDT EBC mappings on Canyonlands.
> First, NAND EBC mapping was missing, making Linux NAND driver
> unusable on this board. Second, NOR remapping code assumed that
> NOR is always on CS0, however when booting from NAND NOR is on CS3.
> ---
> board/amcc/canyonlands/canyonlands.c | 38
> ++++++++++++++++++++++++++------- include/configs/canyonlands.h |
> 2 +
> 2 files changed, 32 insertions(+), 8 deletions(-)
>
> diff --git a/board/amcc/canyonlands/canyonlands.c
> b/board/amcc/canyonlands/canyonlands.c index 2b74689..78c32b0 100644
> --- a/board/amcc/canyonlands/canyonlands.c
> +++ b/board/amcc/canyonlands/canyonlands.c
> @@ -577,20 +577,42 @@ int misc_init_r(void)
> #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
> void ft_board_setup(void *blob, bd_t *bd)
> {
> - u32 val[4];
> int rc;
> + int i;
> + u32 bxcr;
> + u32 ranges[EBC_NUM_BANKS * 4];
> + u32 *p = ranges;
> + char *ebc_path = "/plb/opb/ebc";
>
> ft_cpu_setup(blob, bd);
>
> + /*
> + * Read 4xx EBC bus bridge registers to get mappings of the
> + * peripheral banks into the OPB/PLB address space
> + */
> + for (i = 0; i < EBC_NUM_BANKS; i++) {
> + mtdcr(ebccfga, EBC_BXCR(i));
> + bxcr = mfdcr(ebccfgd);
> +
> + if ((bxcr & EBC_BXCR_BU_MASK) != EBC_BXCR_BU_NONE) {
> + *p++ = i;
> + *p++ = 0;
> + *p++ = bxcr & EBC_BXCR_BAS_MASK;
> + *p++ = EBC_BXCR_BANK_SIZE(bxcr);
> + }
> + }
This is a copy from cpu/ppc4xx/fdt.c. I suggest you just call
__ft_board_setup() and just additionally fixup the canyonlands specifics to
not duplicate this code.
Thanks.
Best regards,
Stefan
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