On 5 January 2015 at 08:28, Bin Meng <bmeng...@gmail.com> wrote:
> Configure coreboot pci memory regions so that pci device drivers
> could work correctly.
>
> Signed-off-by: Bin Meng <bmeng...@gmail.com>
>
> ---
>
> Changes in v2:
> - New patch to configure pci memory regions
>
>  arch/x86/cpu/coreboot/pci.c | 30 ++++++++++++++++++++++++++++--
>  1 file changed, 28 insertions(+), 2 deletions(-)

Acked-by: Simon Glass <s...@chromium.org>

At some point much of this code could go into arch/x86/lib/pci_type1.c
or similar since ivybridge is common. Let's see how things land first.

Regards,
Simon
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