Hi Simon, On Sun, Dec 28, 2014 at 10:20 AM, Simon Glass <s...@chromium.org> wrote: > Cache-as-RAM should be turned off when we relocate since we want to run from > RAM. Add a function to perform this task. > > Signed-off-by: Simon Glass <s...@chromium.org> > --- > > arch/x86/cpu/ivybridge/car.S | 52 > ++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 52 insertions(+) > > diff --git a/arch/x86/cpu/ivybridge/car.S b/arch/x86/cpu/ivybridge/car.S > index 72b22ea..6e7e1e4 100644 > --- a/arch/x86/cpu/ivybridge/car.S > +++ b/arch/x86/cpu/ivybridge/car.S > @@ -163,6 +163,58 @@ wait_for_sipi: > /* return */ > jmp car_init_ret > > +.globl car_uninit > +car_uninit: > + /* Disable cache */ > + movl %cr0, %eax > + orl $X86_CR0_CD, %eax > + movl %eax, %cr0 > + > + /* Disable MTRRs */ > + movl $MTRR_DEF_TYPE_MSR, %ecx > + rdmsr > + andl $(~MTRR_DEF_TYPE_EN), %eax > + wrmsr > + > + /* Disable the no-eviction run state */ > + movl NOEVICTMOD_MSR, %ecx > + rdmsr > + andl $~2, %eax > + wrmsr > + > + invd > + > + /* Disable the no-eviction mode */ > + rdmsr > + andl $~1, %eax > + wrmsr > + > +#ifdef CONFIG_CACHE_MRC_BIN > + /* Clear the MTRR that was used to cache MRC */ > + xorl %eax, %eax > + xorl %edx, %edx > + movl $MTRR_PHYS_BASE_MSR(2), %ecx > + wrmsr > + movl $MTRR_PHYS_MASK_MSR(2), %ecx > + wrmsr > +#endif > + > + /* Enable MTRRs */ > + movl $MTRR_DEF_TYPE_MSR, %ecx > + rdmsr > + orl $MTRR_DEF_TYPE_EN, %eax > + wrmsr > + > + invd > + > + /* Return to the caller */ > + jmp *%ebx > + > +.Lhlt: > + post_code(0xee) > + hlt > + jmp .Lhlt
I don't see any codes could jump to this 4 lines above. Remove it? > mtrr_table: > /* Fixed MTRRs */ > .word 0x250, 0x258, 0x259 > -- Regards, Bin _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
