On 27 December 2014 at 05:10, Bin Meng <bmeng...@gmail.com> wrote:
> On x86, some peripherals on pci buses need to be accessed in the
> early phase (eg: pci uart) with a valid pci memory/io address,
> thus scan the pci bus and do the corresponding resource allocation.
>
> Signed-off-by: Bin Meng <bmeng...@gmail.com>
> ---
>
> Changes in v2: None

Acked-by: Simon Glass <s...@chromium.org>

>
>  arch/x86/cpu/pci.c | 1 +
>  1 file changed, 1 insertion(+)
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