The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet driver, but
the code that used that macro was removed over a year ago, so board
configuration files no longer need to define it.
The _IO_BASE macro is also automatically defined to 0 if it isn't already set,
so there's no need to define that macro either in the board configuration files.
Signed-off-by: Timur Tabi <ti...@freescale.com>
---
include/configs/MPC8349ITX.h | 7 -------
include/configs/MPC8536DS.h | 6 ------
include/configs/MPC8544DS.h | 6 ------
include/configs/MPC8572DS.h | 6 ------
include/configs/MPC8610HPCD.h | 4 ----
include/configs/MPC8641HPCN.h | 4 ----
include/configs/P2020DS.h | 6 ------
7 files changed, 0 insertions(+), 39 deletions(-)
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index f2e574b..d4d3256 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -360,16 +360,9 @@ boards, we say we have two, but don't display a message if
we find only one. */
#define CONFIG_SYS_PCI2_IO_SIZE 0x01000000 /* 16M */
#endif
-#define _IO_BASE 0x00000000 /* points to PCI I/O space */
-
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR 0x00000000
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCI2_MEM_BASE
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 9e00b89..7085d28 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -427,12 +427,6 @@ extern unsigned long get_board_ddr_clk(unsigned long
dummy);
#undef CONFIG_TULIP
#undef CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);})
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 59cfde6..1d8fecf 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -340,12 +340,6 @@ extern unsigned long get_board_sys_clk(unsigned long
dummy);
#undef CONFIG_TULIP
#define CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 2aba689..c7385e4 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -484,12 +484,6 @@ extern unsigned long get_board_ddr_clk(unsigned long
dummy);
#undef CONFIG_TULIP
#undef CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCIE3_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCIE3_IO_BUS
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 1091043..2f40ef4 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -280,10 +280,6 @@
#define CONFIG_SYS_PCI1_IO_VIRT 0xe1000000
#define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */
-/* For RTL8139 */
-#define KSEG1ADDR(x) ({u32 _x = le32_to_cpu(*(u32 *)(x)); (&_x); })
-#define _IO_BASE 0x00000000
-
/* controller 1, Base address 0xa000 */
#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index d8042fb..de2cf1a 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -348,10 +348,6 @@ extern unsigned long get_board_sys_clk(unsigned long
dummy);
| CONFIG_SYS_PHYS_ADDR_HIGH)
#define CONFIG_SYS_PCI1_IO_SIZE 0x00010000 /* 64K */
-/* For RTL8139 */
-#define KSEG1ADDR(x) ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);})
-#define _IO_BASE 0x00000000
-
#ifdef CONFIG_PHYS_64BIT
/*
* Use the same PCI bus address on PCI1 and PCI2 if we have PHYS_64BIT.
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index a39ff26..443bc40 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -517,12 +517,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long
dummy);
#undef CONFIG_TULIP
#define CONFIG_RTL8139
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x) (x)
-#define _IO_BASE 0x00000000
-#endif
-
#ifndef CONFIG_PCI_PNP
#define PCI_ENET0_IOADDR CONFIG_SYS_PCIE3_IO_BUS
#define PCI_ENET0_MEMADDR CONFIG_SYS_PCIE3_IO_BUS
--
1.6.0.6
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