On Sat, 2014-12-06 at 14:07 +0100, Marek Vasut wrote: > On Tuesday, December 02, 2014 at 02:26:14 PM, Stefan Roese wrote: > > This patch adds support for multiple NAND chips connected to the > > i.MX6. Linux already supports this configuration. So lets port > > the missing features to the U-Boot driver to support more than > > one NAND chip here as well. > > > > The necessary changes in detail are: > > > > - Only use DMA channel 0 for all NAND chips: > > Linux: a7c12d01 (mtd: gpmi: use DMA channel 0 for all the > > nand chips) > > d159d8b7 (mtd: gpmi: decouple the chip select from > > the DMA channel) > > - On i.MX6 only use ready/busy pin for CS0: > > Linux: 7caa4fd2 (mtd: gpmi: imx6: fix the wrong method for > > checking ready/busy) > > > > To enable this feature the board needs to configure > > CONFIG_SYS_NAND_MAX_CHIPS to 2 (or more). > > > > With these changes I'm able to detect and acces 2 NAND chips: > > > > => nand device > > > > Device 0: 2x nand0, sector size 128 KiB > > Page size 2048 b > > OOB size 64 b > > Erase size 131072 b > > Shouldn't you see "Device 0" and "Device 1" ?
The "2x" indicates that there are two identical chips being treated as a single device (chip->numchips). -Scott _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
