Signed-off-by: Masahiro Yamada <yamad...@jp.panasonic.com>
---

 arch/arm/dts/Makefile                  |   1 +
 arch/arm/dts/uniphier-ph1-sld3-ref.dts |  57 ++++++++++++++++
 arch/arm/dts/uniphier-ph1-sld3.dtsi    | 121 +++++++++++++++++++++++++++++++++
 3 files changed, 179 insertions(+)
 create mode 100644 arch/arm/dts/uniphier-ph1-sld3-ref.dts
 create mode 100644 arch/arm/dts/uniphier-ph1-sld3.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 01df9a9..187d58c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -33,6 +33,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
        tegra124-jetson-tk1.dtb \
        tegra124-venice2.dtb
 dtb-$(CONFIG_ARCH_UNIPHIER) += \
+       uniphier-ph1-sld3-ref.dtb \
        uniphier-ph1-pro4-ref.dtb \
        uniphier-ph1-ld4-ref.dtb \
        uniphier-ph1-sld8-ref.dtb
diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts 
b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
new file mode 100644
index 0000000..cb255d2
--- /dev/null
+++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
@@ -0,0 +1,57 @@
+/*
+ * Device Tree Source for UniPhier PH1-sLD3 Reference Board
+ *
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamad...@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-sld3.dtsi"
+
+/ {
+       model = "Panasonic UniPhier PH1-sLD3 Reference Board";
+       compatible = "panasonic,ph1-sld3-ref", "panasonic,ph1-sld3";
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x40000000>;
+       };
+
+       chosen {
+               bootargs = "console=ttyPS0,115200 earlyprintk";
+               stdout-path = &uart0;
+       };
+
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+       };
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+       eeprom {
+               compatible = "i2c-eeprom";
+               reg = <0x50>;
+       };
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi 
b/arch/arm/dts/uniphier-ph1-sld3.dtsi
new file mode 100644
index 0000000..23b6767
--- /dev/null
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -0,0 +1,121 @@
+/*
+ * Device Tree Source for UniPhier PH1-sLD3 SoC
+ *
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamad...@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+       compatible = "panasonic,ph1-sld3";
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0>;
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <1>;
+               };
+       };
+
+       soc {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               uart0: serial@54006800 {
+                       compatible = "panasonic,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006800 0x20>;
+                       clock-frequency = <36864000>;
+               };
+
+               uart1: serial@54006900 {
+                       compatible = "panasonic,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006900 0x20>;
+                       clock-frequency = <36864000>;
+               };
+
+               uart2: serial@54006a00 {
+                       compatible = "panasonic,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006a00 0x20>;
+                       clock-frequency = <36864000>;
+               };
+
+               i2c0: i2c@58400000 {
+                       compatible = "panasonic,uniphier-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x58400000 0x40>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@58480000 {
+                       compatible = "panasonic,uniphier-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x58480000 0x40>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@58500000 {
+                       compatible = "panasonic,uniphier-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x58500000 0x40>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@58580000 {
+                       compatible = "panasonic,uniphier-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x58580000 0x40>;
+                       status = "disabled";
+               };
+
+               usb0: usb@5a800100 {
+                       compatible = "panasonic,uniphier-ehci", "usb-ehci";
+                       status = "disabled";
+                       reg = <0x5a800100 0x100>;
+               };
+
+               usb1: usb@5a810100 {
+                       compatible = "panasonic,uniphier-ehci", "usb-ehci";
+                       status = "disabled";
+                       reg = <0x5a810100 0x100>;
+               };
+
+               usb2: usb@5a820100 {
+                       compatible = "panasonic,uniphier-ehci", "usb-ehci";
+                       status = "disabled";
+                       reg = <0x5a820100 0x100>;
+               };
+
+               usb3: usb@5a830100 {
+                       compatible = "panasonic,uniphier-ehci", "usb-ehci";
+                       status = "disabled";
+                       reg = <0x5a830100 0x100>;
+               };
+
+               nand: nand@f8000000 {
+                       compatible = "denali,denali-nand-dt";
+                       reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;
+                       reg-names = "nand_data", "denali_reg";
+               };
+       };
+};
-- 
1.9.1

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