On Wednesday, November 12, 2014 at 06:51:42 PM, Pavel Machek wrote: > Hi! > > You tripped my spell-checker, sorry. > > > This patch adds the driver for the Designware master SPI controller. This > > IP core is integrated on the Altera SoCFPGA. This implementation is a > > driver model (DM) implementation. So multiple SPI drivers can be used. > > Thats necessary, since SoCFPGA also integrates the Cadence QSPI > > controller used to connect the SPI NOR flashes. Without DM, using > > multiple SPI driver is not possible. > > drivers. > > > This driver is very loosly based on the Linux driver. Most of the > > loosely? > > > driver is removed. Only the polling loop for the transfer is really used > > from this driver. As we don't support interrupts and DMA right now. > > , as > > > + * Very loosly based on the Linux driver version which is: > loosely. (And citing filename here might be useful.)
I fixed the text and I placed this whole driver patchset to u-boot-socfpga:topic/drivers/spi-20141114 Can you please fix the code so I can replace that one patch ? Or just send me one which I can squash into this patch, either way works. Thanks! Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
