The Freescale LS1021AQDS share some pins, so Add the hwconfig option
that allows the user to choose which the function he wants.
The main pin mux IP is:
eSDHC, SAI, IIC2, RGMII, CAN, SAI.
Signed-off-by: Yuan Yao <yao.y...@freescale.com>
---
board/freescale/ls1021aqds/ls1021aqds.c | 67 ++++++++++++++++++++++++++++++++-
include/configs/ls1021aqds.h | 1 +
2 files changed, 67 insertions(+), 1 deletion(-)
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c
b/board/freescale/ls1021aqds/ls1021aqds.c
index 12e83f7..9229151 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -10,6 +10,7 @@
#include <asm/arch/immap_ls102xa.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
+#include <hwconfig.h>
#include <mmc.h>
#include <fsl_esdhc.h>
#include <fsl_ifc.h>
@@ -20,6 +21,11 @@
DECLARE_GLOBAL_DATA_PTR;
enum {
+ MUX_TYPE_CAN,
+ MUX_TYPE_IIC2,
+ MUX_TYPE_RGMII,
+ MUX_TYPE_SAI,
+ MUX_TYPE_SDHC,
MUX_TYPE_SD_PCI4,
MUX_TYPE_SD_PC_SA_SG_SG,
MUX_TYPE_SD_PC_SA_PC_SG,
@@ -157,11 +163,27 @@ int board_early_init_f(void)
int config_board_mux(int ctrl_type)
{
- u8 reg12;
+ u8 reg12, reg14;
reg12 = QIXIS_READ(brdcfg[12]);
+ reg14 = QIXIS_READ(brdcfg[14]);
switch (ctrl_type) {
+ case MUX_TYPE_CAN:
+ reg14 = (reg14 & 0xf0) | 0x03;
+ break;
+ case MUX_TYPE_IIC2:
+ reg14 = (reg14 & 0x0f) | 0xa0;
+ break;
+ case MUX_TYPE_RGMII:
+ reg14 = (reg14 & 0xf0) | 0x0;
+ break;
+ case MUX_TYPE_SAI:
+ reg14 = (reg14 & 0xf0) | 0x0c;
+ break;
+ case MUX_TYPE_SDHC:
+ reg14 = (reg14 & 0x0f) | 0x0;
+ break;
case MUX_TYPE_SD_PCI4:
reg12 = 0x38;
break;
@@ -180,6 +202,7 @@ int config_board_mux(int ctrl_type)
}
QIXIS_WRITE(brdcfg[12], reg12);
+ QIXIS_WRITE(brdcfg[14], reg14);
return 0;
}
@@ -213,6 +236,48 @@ int config_serdes_mux(void)
return 0;
}
+int misc_init_r(void)
+{
+ int conflict_flag;
+
+ /* some signals can not enable simultaneous*/
+ conflict_flag = 0;
+ if (hwconfig("sdhc"))
+ conflict_flag++;
+ if (hwconfig("iic2"))
+ conflict_flag++;
+ if (conflict_flag > 1) {
+ printf("WARNING: pin conflict !\n");
+ return 0;
+ }
+
+ conflict_flag = 0;
+ if (hwconfig("rgmii"))
+ conflict_flag++;
+ if (hwconfig("can"))
+ conflict_flag++;
+ if (hwconfig("sai"))
+ conflict_flag++;
+ if (conflict_flag > 1) {
+ printf("WARNING: pin conflict !\n");
+ return 0;
+ }
+
+ if (hwconfig("can"))
+ config_board_mux(MUX_TYPE_CAN);
+ else if (hwconfig("rgmii"))
+ config_board_mux(MUX_TYPE_RGMII);
+ else if (hwconfig("sai"))
+ config_board_mux(MUX_TYPE_SAI);
+
+ if (hwconfig("iic2"))
+ config_board_mux(MUX_TYPE_IIC2);
+ else if (hwconfig("sdhc"))
+ config_board_mux(MUX_TYPE_SDHC);
+
+ return 0;
+}
+
int board_init(void)
{
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index bb47813..acb2aed 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -326,6 +326,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_IMLS
+#define CONFIG_MISC_INIT_R
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
--
2.1.0.27.g96db324
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
