It is set to 0x1F by default and can be overwritten on the board
header file by defining CONFIG_UTBIPAR_INIT_TBIPA. This allows
the CPU to simply "reserve" one SMI address instead of using
a different one for each UEC.
---
drivers/qe/uec.c | 17 +++++++++--------
1 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index 91d1182..a8a229f 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -31,6 +31,11 @@
#include "uec_phy.h"
#include "miiphy.h"
+/* Default UTBIPAR SMI address */
+#ifndef CONFIG_UTBIPAR_INIT_TBIPA
+#define CONFIG_UTBIPAR_INIT_TBIPA 0x1F
+#endif
+
#ifdef CONFIG_UEC_ETH1
static uec_info_t eth1_uec_info = {
.uf_info = {
@@ -1179,15 +1184,11 @@ static int uec_startup(uec_private_t *uec)
utbipar = in_be32(&uec_regs->utbipar);
utbipar &= ~UTBIPAR_PHY_ADDRESS_MASK;
enet_interface = uec->uec_info->enet_interface;
- if (enet_interface == ENET_1000_TBI ||
- enet_interface == ENET_1000_RTBI) {
- utbipar |= (uec_info->phy_address + uec_info->uf_info.ucc_num)
- << UTBIPAR_PHY_ADDRESS_SHIFT;
- } else {
- utbipar |= (0x10 + uec_info->uf_info.ucc_num)
- << UTBIPAR_PHY_ADDRESS_SHIFT;
- }
+ /* Initialize UTBIPAR address to CONFIG_UTBIPAR_INIT_TBIPA for ALL UEC.
+ * This frees up the remaining SMI addresses for use.
+ */
+ utbipar |= CONFIG_UTBIPAR_INIT_TBIPA << UTBIPAR_PHY_ADDRESS_SHIFT;
out_be32(&uec_regs->utbipar, utbipar);
/* Allocate Tx BDs */
--
1.6.2.4
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