This is needed for the SoCFPGA booting from SPI NOR flash
e.g. (N25Q256A). With these changes, the SoCrates can boot and
re-boot (reset) from SPI NOR flash without any problems.
Signed-off-by: Stefan Roese <s...@denx.de>
Cc: Chin Liang See <cl...@altera.com>
Cc: Dinh Nguyen <dingu...@altera.com>
Cc: Vince Bridgers <vbrid...@altera.com>
Cc: Marek Vasut <ma...@denx.de>
Cc: Pavel Machek <pa...@denx.de>
Cc: Michael Trimarchi <mich...@amarulasolutions.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.t...@gmail.com>
---
drivers/mtd/spi/sf_probe.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 4d148d1..85b2677 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -355,6 +355,37 @@ static struct spi_flash *spi_flash_probe_slave(struct
spi_slave *spi)
}
}
+#ifdef CONFIG_SPI_N25Q256A_RESET
+#define CMD_RESET_ENABLE 0x66
+#define CMD_RESET_MEMORY 0x99
+ /*
+ * This is needed for the SoCFPGA booting from SPI NOR flash
+ * e.g. (N25Q256A). Additionally its necessary to change
+ * this line in the Linux SPI NOR flash driver:
+ *
+ * { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512,
+ * SECT_4K | SHUTDOWN_3BYTE) },
+ *
+ * Add SHUTDOWN_3BYTE here.
+ *
+ * With these changes, the SoCrates can boot and re-boot
+ * (reset) from SPI NOR flash without any problems.
+ */
+ ret = spi_flash_cmd(spi, CMD_RESET_ENABLE, NULL, 0);
+ if (ret) {
+ printf("SF: Failed issue reset command\n");
+ goto err_read_id;
+ }
+
+ ret = spi_flash_cmd(spi, CMD_RESET_MEMORY, NULL, 0);
+ if (ret) {
+ printf("SF: Failed issue reset command\n");
+ goto err_read_id;
+ }
+
+ printf("SF: Device software reset\n");
+#endif
+
#ifdef CONFIG_OF_CONTROL
if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
debug("SF: FDT decode error\n");
--
2.1.1
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