Ok. Jean.
Very thanks to review.
I have a question about one thing you pointed out.
===
as it's nearly only in asm implement it in assembly olny will be better
> + /* ES2 onwards we can disable/enable L2 ourselves */
> + if (get_cpu_rev() >= CPU_3XX_ES20) {
> + __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
> + __asm__ __volatile__("orr %0, %0, #0x2":"=r"(i));
===
I think you tell me the position is in the assembly code like lowlevel_init.S.
Is it right?
Can you explain more detailed about this part, plz? :)
If my thinking is alright, I'll re-update this patch soon.
Best Regards,
Riverful
----- 원본 메시지 -----
보낸 사람: Jean-Christophe PLAGNIOL-VILLARD <plagn...@jcrosoft.com>
보낸 날짜: 2009년 5월 30일 토요일 오전 6:46
받는 사람: Kim, Heung Jun <river...@gmail.com>
참조: u-boot@lists.denx.de; Dirk Behme <dirk.be...@googlemail.com>;
riverful....@samsung.com; inki....@samsung.com; mk7.k...@samsung.com;
kyungmin.p...@samsung.com; bh...@samsung.com; jh106.c...@samsung.com
제목: Re: [U-Boot] [PATCH] Move L2-cache enable/disable function to soc
dependent code
On 20:27 Fri 29 May , Kim, Heung Jun wrote:
> The L2 cache enable/disable function in the cpu/arm_cortexa8/cpu.c moved
> to cpu/arm_cortexa8/omap3/cache.c.
please mention omap3 in the title too
>
> Signed-off-by: HeungJun, Kim <riverful....@samsung.com>
> ---
> + * (C) Copyright 2002
> + * Gary Jennejohn, DENX Software Engineering, <g...@denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +/*
> + * L2 cache specific code
> + */
> +
> +#include <common.h>
> +#include <command.h>
> +#include <asm/arch/sys_proto.h>
> +
> +void l2_cache_enable()
> +{
> + unsigned long i;
> + volatile unsigned int j;
> +
as it's nearly only in asm implement it in assembly olny will be better
> + /* ES2 onwards we can disable/enable L2 ourselves */
> + if (get_cpu_rev() >= CPU_3XX_ES20) {
> + __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
> + __asm__ __volatile__("orr %0, %0, #0x2":"=r"(i));
<snip>
> diff --git a/include/asm-arm/arch-omap3/sys_proto.h
> b/include/asm-arm/arch-omap3/sys_proto.h
> index 7361d08..4f43aef 100644
> --- a/include/asm-arm/arch-omap3/sys_proto.h
> +++ b/include/asm-arm/arch-omap3/sys_proto.h
> @@ -63,5 +63,7 @@ void make_cs1_contiguous(void);
> void omap_nand_switch_ecc(int);
> void power_init_r(void);
> void dieid_num_r(void);
> +void l2_cache_disable();
> +void l2_cache_enable();
please move these two funtcions in
include/asm-arm/cache.h
please rebase it against the u-boot-arm/next
Best Regards,
J.
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