From: Maxime Ripard <maxime.rip...@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Signed-off-by: Hans de Goede <hdego...@redhat.com>
[w...@csie.org: commit message was "ARM: sunxi: Setup the A31 UART0 muxing"]
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/cpu/armv7/sunxi/board.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index f2cedbb..fc6aa4b 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -54,6 +54,10 @@ int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
sunxi_gpio_set_pull(SUNXI_GPB(23), 1);
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN6I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(20), 2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(21), 2);
+ sunxi_gpio_set_pull(SUNXI_GPH(21), 1);
#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN5I)
sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX);
sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX);
--
2.1.0
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