Hi Stefano, On Mon, Aug 25, 2014 at 1:34 PM, Fabio Estevam <fabio.este...@freescale.com> wrote: > mx6solox has a requirement for 64 bytes alignment for RX DMA transfer. > Other SoCs work with the standard 32 bytes alignment. > > Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers, > which addresses the needs from mx6solox and also works for the other SoCs. > > Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
Could we have this series applied for 2014.10-rc ? _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
