Dear Otavio, In message <cap9odkrsc4o-p7+cmkkbeda8wwwxvpnpxoyoctp6wcvoj5g...@mail.gmail.com> you wrote: > > I disagree (but this is my personal view on this). The reason why I > disagree is because the DDR calibration is very design dependant so > if/when Freescale optimize their DDR data setting they may break any > other board using it however they shouldn't be blamed by it as this is > their DDR settings. Any board including this file (which can be and is > done) takes the responsibility and risks.
Obviously, any changes to common code used by several boards needs to be tested on the affected boards. Also, it might be instructive for you to read the commit message for af7ec0b "mx6q: Factor out common DDR3 init code". Apparently Fabio considers this "common DDR3 initialization code", so what exactly are your arguments to the contrary? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de To be is to program. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
