As extra FPGA settings is needed for MDIO read/write
on LS1021AQDS, private MDIO read/write functions are
created.
Signed-off-by: Alison Wang <alison.w...@freescale.com>
---
Change log:
v4: No change.
v3: Split from the 0004-arm-ls102xa-Add-etsec-support-for-LS102xA patch.
v2: Add private mdio read and write support.
drivers/net/fsl_mdio.c | 9 +++++++--
include/fsl_mdio.h | 4 ++++
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c
index 8d09f5d..6eae78f 100644
--- a/drivers/net/fsl_mdio.c
+++ b/drivers/net/fsl_mdio.c
@@ -98,8 +98,13 @@ int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info
*info)
return -1;
}
- bus->read = tsec_phy_read;
- bus->write = tsec_phy_write;
+ if (info->priv_mdio_read) {
+ bus->read = info->priv_mdio_read;
+ bus->write = info->priv_mdio_write;
+ } else {
+ bus->read = tsec_phy_read;
+ bus->write = tsec_phy_write;
+ }
bus->reset = fsl_pq_mdio_reset;
sprintf(bus->name, info->name);
diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h
index a531edf..633123c 100644
--- a/include/fsl_mdio.h
+++ b/include/fsl_mdio.h
@@ -57,6 +57,10 @@ int memac_mdio_read(struct mii_dev *bus, int port_addr, int
dev_addr,
struct fsl_pq_mdio_info {
struct tsec_mii_mng __iomem *regs;
char *name;
+ int (*priv_mdio_read)(struct mii_dev *bus, int addr,
+ int devad, int reg);
+ int (*priv_mdio_write)(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 val);
};
int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info);
--
1.8.4
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