This series contain the support for Freescale LS102xA SoC
and LS1021AQDS/TWR board.
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.
Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7
cores that have been optimized for high reliability and pack
the highest level of integration available for sub-3 W embedded
communications processors with Layerscape architecture and with
a comprehensive enablement model focused on ease of programmability.
For the detail information about LS1021AQDS/TWR board, please
refer to README in the patch.
Changes in v4:
- Add commit messages.
Changes in v3:
- Fix checkpatch errors.
- Add I2C 3 support.
- Split arm: ls102xa: Add etsec support for LS102xA into 3 patches. The
3 patches:
net: mdio: Add private MDIO read/write function,
net: mdio: Use mb() to be compatible for both ARM and PowerPC,
ls102xa: etsec: Add etsec support for LS102xA.
- Use mb() to be compatible for both ARM and PowerPC.
- Update to Kconfig.
- Add new patches:
net: tsec: Remove tx snooping support from LS1
serial: lpuart: add 32-bit registers lpuart support
arm: ls102xa: Add LETECH support for LS1021AQDS/TWR board
video: dcu: Add Sii9022A HDMI Transmitter support
video: dcu: Add DCU driver support
ls102xa: dcu: Add platform support for DCU on LS1021ATWR board
Changes in v2:
- Add serdes support.
- Update DDR frequency and data rate information.
- Fix overflow condition error for the timer.
- Add private mdio read and write support.
- Remove ethaddr/ipaddr setting.
- Add board maintainer.
- Add serdes and multiple ethernet controllers support.
- Add new patch:
arm: ls102xa: Add basic support for LS1021ATWR board
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