T1042RDB is Freescale Reference Design Board supporting the T1042
QorIQ Power Architecture processor. T1042 is a reduced personality
of T1040 SoC without Integrated 8-port Gigabit. The board is designed
with low power features targeted for Printing Image Market.
T1042RDB board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Two on-board RGMII 10/100/1G ethernet ports.
- SERDES Connections, 8 lanes supporting:
- PCI
- SGMII
- SATA 2.0
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
- IFC/Local Bus
- NAND flash: 1GB 8-bit NAND flash
- NOR: 128MB 16-bit NOR Flash
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- CPLD
- Clocks
- System and DDR clock (SYSCLK, ?DDRCLK?)
- SERDES clocks
- Video
- DIU supports video at up to 1280x1024x32bpp
- HDMI connector
- Power Supplies
- USB
- Supports two USB 2.0 ports with integrated PHYs
- Two type A ports with 5V@1.5A per port.
- SDHC
- SDHC/SDXC connector
- SPI
- On-board 64MB SPI flash
- I2C
- Device connected: EEPROM, thermal monitor, VID controller, RTC
- Other IO
- Two Serial ports
- ProfiBus port
T1042RDB is configured as serdes protocol 0x86 which can
support following interfaces
2 RGMIIS on DTSEC4, DTSEC5
1 SGMII on DTSEC3
Comments updated for 0x06 protocol in place of 0x66 protocol for T1042RDB_PI
This patch also does minor clean ups for fdt defines for T1042RDB_PI board
Signed-off-by: Vijay Rai <vijay....@freescale.com>
Signed-off-by: Priyanka Jain <priyanka.j...@freescale.com>
---
board/freescale/t104xrdb/t1042_rcw.cfg | 2 +-
boards.cfg | 1 +
include/configs/T104xRDB.h | 15 +++++++++------
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/board/freescale/t104xrdb/t1042_rcw.cfg
b/board/freescale/t104xrdb/t1042_rcw.cfg
index a3ea8ad..57de89a 100644
--- a/board/freescale/t104xrdb/t1042_rcw.cfg
+++ b/board/freescale/t104xrdb/t1042_rcw.cfg
@@ -1,6 +1,6 @@
#PBL preamble and RCW header
aa55aa55 010e0100
-# serdes protocol 0x66
+# serdes protocol 0x06
0c18000e 0e000000 00000000 00000000
06000002 00400002 e8106000 01000000
00000000 00000000 00000000 00030810
diff --git a/boards.cfg b/boards.cfg
index b8cfead..a989ea2 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -961,6 +961,7 @@ Active powerpc mpc85xx - freescale
t104xrdb
Active powerpc mpc85xx - freescale t104xrdb
T1040RDB_SDCARD
T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD
-
Active powerpc mpc85xx - freescale t104xrdb
T1040RDB_SECURE_BOOT
T104xRDB:PPC_T1040,SECURE_BOOT,T1040RDB
Aneesh Bansal
<aneesh.ban...@freescale.com>
Active powerpc mpc85xx - freescale t104xrdb
T1040RDB_SPIFLASH
T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH
Priyanka Jain
<priyanka.j...@freescale.com>
+Active powerpc mpc85xx - freescale t104xrdb
T1042RDB T104xRDB:PPC_T1042,T1042RDB
Priyanka Jain <priyanka.j...@freescale.com>
Active powerpc mpc85xx - freescale t104xrdb
T1042RDB_PI T104xRDB:PPC_T1042,T1042RDB_PI
Priyanka Jain <priyanka.j...@freescale.com>
Active powerpc mpc85xx - freescale t104xrdb
T1042RDB_PI_NAND
T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND
Priyanka Jain
<priyanka.j...@freescale.com>
Active powerpc mpc85xx - freescale t104xrdb
T1042RDB_PI_SDCARD
T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD
-
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 8d6c51b..0e6b2e8 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -451,7 +451,7 @@
/* I2C bus multiplexer */
#define I2C_MUX_PCA_ADDR 0x70
-#ifdef CONFIG_T1040RDB
+#if defined (CONFIG_T1040RDB) || defined (CONFIG_T1042RDB)
#define I2C_MUX_CH_DEFAULT 0x8
#endif
@@ -603,7 +603,7 @@
#define CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_DPAA_PME
-#ifdef CONFIG_T1040RDB
+#if defined (CONFIG_T1040RDB) || defined (CONFIG_T1042RDB)
#define CONFIG_QE
#define CONFIG_U_QE
#endif
@@ -632,7 +632,7 @@
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
#endif
-#ifdef CONFIG_T1040RDB
+#if defined (CONFIG_T1040RDB) || defined (CONFIG_T1042RDB)
#if defined(CONFIG_SPIFLASH)
#define CONFIG_SYS_QE_FW_ADDR 0x130000
#elif defined(CONFIG_SDCARD)
@@ -656,7 +656,7 @@
#endif
#ifdef CONFIG_FMAN_ENET
-#ifdef CONFIG_T1040RDB
+#if defined (CONFIG_T1040RDB) || defined (CONFIG_T1042RDB)
#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03
#endif
#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01
@@ -763,8 +763,11 @@
#define FDTFILE "t1040rdb/t1040rdb.dtb"
#define RAMDISKFILE "t1040rdb/ramdisk.uboot"
#elif CONFIG_T1042RDB_PI
-#define FDTFILE "t1040rdb_pi/t1040rdb_pi.dtb"
-#define RAMDISKFILE "t1040rdb_pi/ramdisk.uboot"
+#define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb"
+#define RAMDISKFILE "t1042rdb_pi/ramdisk.uboot"
+#elif CONFIG_T1042RDB
+#define FDTFILE "t1042rdb/t1042rdb.dtb"
+#define RAMDISKFILE "t1042rdb/ramdisk.uboot"
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
--
1.7.9.5
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