From: Fabio Estevam <fabio.este...@freescale.com>
On mx6solox there is an additional 0x4000 offset for the GPR registers.
Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
---
This applies against 'next' branch.
arch/arm/include/asm/arch-mx6/imx-regs.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 782d9c4..cc746b8 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -398,6 +398,9 @@ struct src {
struct iomuxc {
+#ifdef CONFIG_MX6SX
+ u8 reserved[0x4000];
+#endif
u32 gpr[14];
u32 omux[5];
/* mux and pad registers */
--
1.8.3.2
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