cashe/cache in patch name On Mon, Jul 7, 2014 at 9:46 PM, Simon Glass <s...@chromium.org> wrote: > Things run faster when the data cache is enabled, so turn it on along with > the 'dcache' command. > > Signed-off-by: Simon Glass <s...@chromium.org> > --- > > include/configs/exynos5-dt.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h > index e36a031..4e316b9 100644 > --- a/include/configs/exynos5-dt.h > +++ b/include/configs/exynos5-dt.h > @@ -37,8 +37,8 @@ > #define CONFIG_TRACE_EARLY_ADDR 0x50000000 > > /* Keep L2 Cache Disabled */ > -#define CONFIG_SYS_DCACHE_OFF > #define CONFIG_SYS_CACHELINE_SIZE 64 > +#define CONFIG_CMD_CACHE > > /* Enable ACE acceleration for SHA1 and SHA256 */ > #define CONFIG_EXYNOS_ACE_SHA > -- > 2.0.0.526.g5318336 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot Able to test display on peach_pit(which needs tps65090) with these patches. Also, crosec commands from u-boot prompt works as expected on peach_pit.
Tested-by: Ajay Kumar <ajaykumar...@samsung.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
