Hi Stephen, > Subject: [U-Boot] [PATCH 2/3] i2c: tegra: write clean data to TX FIFO > > From: Stephen Warren <swar...@nvidia.com> > > The Tegra I2C controller's TX FIFO contains 32-bit words. If the final FIFO > entry of a transaction contains fewer than 4 bytes, the driver currently fills > the unused FIFO bytes with uninitialized data. This can be confusing when > reading back the FIFO content for debugging purposes. > > Solve this by explicitly initializing the variable containing FIFO data before > filling it (partially) with data. With this change, send_recv_packets()'s > loop's if > (is_write) code mirrors the else (i.e. > read) branch. > > Signed-off-by: Stephen Warren <swar...@nvidia.com>
LGME. Reviewed-by: Yen Lin <ye...@nvidia.com> Regards, Yen Lin ----------------------------------------------------------------------------------- This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message. ----------------------------------------------------------------------------------- _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
