On 26 May 2014 07:48, Akshay Saraswat <aksha...@samsung.com> wrote: > This patch intends to remove all code which enables hardware read > leveling. All characterization environments may not cope up with > h/w read leveling enabled, so we must disable this. > Also, disabling h/w read leveling improves the MIF LVcc value > (LVcc value is the value at which DDR will fail to work properly). > Improving LVcc means we have enough voltage margin for MIF. > When h/w leveling is enabled, we have almost zero volatge margin. > > Signed-off-by: Alim Akhtar <alim.akh...@samsung.com> > Signed-off-by: Akshay Saraswat <aksha...@samsung.com> > Acked-by: Simon Glass <s...@chromium.org>
Tested on pit Tested-by: Simon Glass <s...@chromium.org> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
