This patch series intends to add few changes with respect to
ddr3 init function definition and read leveling.
Changes since v1:
- Added "Acked-by" in patches 1/4, 2/4 and 3/4.
- Removing only "mem_iv_size" argument now in patch 1/4.
- Modified commit-msg for patch 4/4.
- Fixed few nits in patch 4/4.
Akshay Saraswat (3):
Exynos5: DMC: Modify the definition of ddr3_mem_ctrl_init
Exynos5420: Remove code for enabling read leveling
Exynos5420: DMC: Add software read leveling
Doug Anderson (1):
DMC: exynos5420: Gate CLKM to when reading PHY_CON13
arch/arm/cpu/armv7/exynos/dmc_common.c | 2 +-
arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c | 369 ++++++++++++++++++++++-------
arch/arm/cpu/armv7/exynos/exynos5_setup.h | 14 +-
arch/arm/include/asm/arch-exynos/dmc.h | 3 +
arch/arm/include/asm/arch-exynos/power.h | 4 +-
5 files changed, 297 insertions(+), 95 deletions(-)
--
1.7.9.5
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