On 4/2/2014 3:42 AM, Scott Wood wrote:
On Mon, 2014-03-31 at 15:35 +0530, Prabhakar Kushwaha wrote:
+void board_init_f(ulong bootflag)
+{
+       u32 plat_ratio, sys_clk, uart_clk;
+       ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+       /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
+       memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
+
+       /* Update GD pointer */
+       gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
+       __asm__ __volatile__("" : : : "memory");
Explain why this barrier is needed.


I followed similar to what is present in arch/powerpc/lib/board.c.
There is is mentioned like
    /* compiler optimization barrier needed for GCC >= 3.4 */
    __asm__ __volatile__("":::"memory");

may i mention this comment here also.


+#ifndef CONFIG_SPL_NAND_BOOT
+       env_init();
+#endif
+
+       /* relocate environment function pointers etc. */
+#ifdef CONFIG_SPL_NAND_BOOT
+       nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+                           (uchar *)CONFIG_ENV_ADDR);
+       gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
+       gd->env_valid = 1;
+#else
+       env_relocate();
+#endif
Move env_init() to be just before env_relocate(), rather than
duplicating the ifdef.

sure, I will do it.

+       i2c_init_all();
+
+       puts("\n\n");
+
+       gd->ram_size = initdram(0);
What is the 0?

here  0 is board type.

in arch/powerpc/lib/board.c , we pass it as 0 "dummy arg".
Same I am following here

diff --git a/doc/README.b4860qds b/doc/README.b4860qds
index 3da77d9..44b46da 100644
--- a/doc/README.b4860qds
+++ b/doc/README.b4860qds
@@ -328,3 +328,38 @@ The below commands apply to both B4860QDS and B4420QDS.
     On Linux the interfaces are renamed as:
        . eth2 -> fm1-gb2
        . eth3 -> fm1-gb3
+
+NAND boot with 2 Stage boot loader
+----------------------------------
+PBL initialise the internal SRAM and copy SPL(160KB) in SRAM.
+SPL further initialise DDR using SPD and environment variables and copy
+u-boot(768 KB) from flash to DDR.
+Finally SPL transer control to u-boot for futher booting.
+
+SPL has following features:
+ - Executes within 256K
+ - No relocation required
+
+ Run time view of SPL framework :-
+ -----------------------------------------------
+ Area        | Address                         |
+-----------------------------------------------
+ Reserve     | 0xFFFC0000 (32KB)               |
s/Reserve/Reserved/

What is it reserved for/by?  Something external?  Or does U-Boot just
not use that area currently?  In that case just say "Unused".
Secure boot requires some memory in SRAM in order to put  some headers etc.
May be I mention in README also

+NAND Flash memory Map on B4860 and B4420QDS
+------------------------------------------
+ Start          End            Definition                      Size
+0x000000       0x0FFFFF        u-boot                          1MB
+0x140000       0x15FFFF        u-boot env                      128KB
+0x160000       0x17FFFF        FMAN Ucode                      128KB
What goes at 0x100000?

I think, ENV can start from here.

What if 0x140000 or 0x160000 is a bad block?


it can be true for any region. I believe it will be taken care by MTD layer to read next good block.

are you suggesting to have a hole of 1 block between every regions.

Regards,
Prabhakar




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