From: Inha Song <ideal.s...@samsung.com>
This patch fixed that cfg value is set to wrong value.
Because it didn't read the related register.
(Based on Inha's patch : "arm:exynos:add missing readl")
Signed-off-by: Inha Song <ideal.s...@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
---
arch/arm/cpu/armv7/exynos/clock.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 6807ff3..61cd8cf 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -1114,6 +1114,7 @@ void exynos4_set_lcd_clk(void)
* MIPI0_PRE_RATIO [23:20]
* set fimd ratio
*/
+ cfg = readl(&clk->div_lcd0);
cfg &= ~(0xf);
cfg |= 0x1;
writel(cfg, &clk->div_lcd0);
@@ -1176,6 +1177,7 @@ void exynos5_set_lcd_clk(void)
* MIPI0_PRE_RATIO [23:20]
* set fimd ratio
*/
+ cfg = readl(&clk->div_disp1_0);
cfg &= ~(0xf);
cfg |= 0x0;
writel(cfg, &clk->div_disp1_0);
@@ -1236,6 +1238,7 @@ void exynos4_set_mipi_clk(void)
* MIPI0_PRE_RATIO [23:20]
* set mipi ratio
*/
+ cfg = readl(&clk->div_lcd0);
cfg &= ~(0xf << 16);
cfg |= (0x1 << 16);
writel(cfg, &clk->div_lcd0);
--
1.7.9.5
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