-Add usb2 node entry in "hwconfig string"

-Remove controller interleaving from hwconfig string as T1040
 has only one DDR conroller

-SPI related macros which were earlier under #ifdef CONFIG_SPIFLASH
 are move outside so that they are defined for all cases as these
 macros are also used by other u-boot code

-Add CONFIG_SYS_CSPR2_EXT to make cpld accessible in u-boot

Signed-off-by: Prabhakar Kushwaha <prabha...@freescale.com>
---
Changes for v2:
        correct usb1 string for ;

 include/configs/T1042RDB_PI.h |   15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h
index 104bb92..cd18de5 100644
--- a/include/configs/T1042RDB_PI.h
+++ b/include/configs/T1042RDB_PI.h
@@ -80,10 +80,6 @@
 #if defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000
@@ -203,6 +199,7 @@
 /* CPLD on IFC */
 #define CONFIG_SYS_CPLD_BASE   0xffdf0000
 #define CONFIG_SYS_CPLD_BASE_PHYS      (0xf00000000ull | CONFIG_SYS_CPLD_BASE)
+#define CONFIG_SYS_CSPR2_EXT   (0xf)
 #define CONFIG_SYS_CSPR2       (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \
                                | CSPR_PORT_SIZE_8 \
                                | CSPR_MSEL_GPCM \
@@ -395,6 +392,10 @@
 #define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED         10000000
 #define CONFIG_SF_DEFAULT_MODE          0
+#define CONFIG_ENV_SPI_BUS              0
+#define CONFIG_ENV_SPI_CS               0
+#define CONFIG_ENV_SPI_MAX_HZ           10000000
+#define CONFIG_ENV_SPI_MODE             0
 
 /*
  * General PCI
@@ -632,9 +633,9 @@
 #define __USB_PHY_TYPE utmi
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
-       "hwconfig=fsl_ddr:ctlr_intlv=cacheline,"                \
-       "bank_intlv=cs0_cs1;"                                   \
-       "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
+       "hwconfig=fsl_ddr:bank_intlv=cs0_cs1;"                  \
+       "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\
+       "usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
        "netdev=eth0\0"                                         \
        "uboot=" __stringify(CONFIG_UBOOTPATH) "\0"             \
        "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"     \
-- 
1.7.9.5



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