Hi Haijun, On Dec 11, 2013, at 7:35 AM, Haijun Zhang wrote:
> Card detection pin is ineffective on T4240QDS Rev1.0. > There are two cards can be connected to board. > 1. eMMC card is built-in board, can not be removed. so > For eMMC card it is always there. > 2. Card detecting pin is functional for SDHC card in Rev2.0. > > This workaround force sdhc driver scan and initialize the card > regardless of whether the card is inserted or not in case Rev1.0. > > Signed-off-by: Haijun Zhang <haijun.zh...@freescale.com> > --- > changes for V2: > - Add the judgement condition for this broken card > > drivers/mmc/fsl_esdhc.c | 9 +++++++++ > include/configs/T4240QDS.h | 2 ++ > 2 files changed, 11 insertions(+) > > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c > index 134a02d..b3b5f37 100644 > --- a/drivers/mmc/fsl_esdhc.c > +++ b/drivers/mmc/fsl_esdhc.c > @@ -548,6 +548,15 @@ static int esdhc_getcd(struct mmc *mmc) > struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; > int timeout = 1000; > > + /* > + * Card detecting pin is not functional on T4240QDS with rev 1.0 SoC. > + * Presuming card is present. > + */ > +#if defined(CONFIG_T4240QDS) > + if (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || > + IS_SVR_REV(get_svr(), 1, 0)) > + return 1; > +#endif I just don't like this. It's a bunch of completely board specific code dropped in the middle of a generic driver. Rework to something like this: In the board file (T4240QDS) #define CONFIG_ESDHC_DETECT_QUIRK \ (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \ IS_SVR_REV(get_svr(), 1, 0))) And do this in the driver: #ifdef CONFIG_ESDHC_DETECT_QUIRK if (CONFIG_ESDHC_DETECT_QUIRK) return 1; #endif Do the same to all other quirks please. > while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout) > udelay(1000); > > diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h > index c96df54..955e6b9 100644 > --- a/include/configs/T4240QDS.h > +++ b/include/configs/T4240QDS.h > @@ -165,6 +165,8 @@ unsigned long get_board_ddr_clk(void); > #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 > #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 > #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 > +#define QIXIS_BRDCFG5 0x55 > +#define QIXIS_MUX_SDHC 2 > #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) > > #define CONFIG_SYS_CSPR3_EXT (0xf) > -- > 1.8.4.1 > > Regards -- Pantelis _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot