On Tue, Dec 24, 2013 at 1:30 PM, ranjani.vaidyanat...@freescale.com
<ranjani.vaidyanat...@freescale.com> wrote:
> Hi Fabio,
>
> The PU power-up/power-down sequence has specific steps, includes some clock 
> management. Please refer to the kernel code for the sequence.

Thanks for the review, Ranjani.

Just sent v2 that disables vddpu in the same way as in kernel.

Regards,

Fabio Estevam
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to