On 11/25/2013 03:54 AM, Alban Bedel wrote: > On Thu, 21 Nov 2013 13:26:07 -0700 > Stephen Warren <swar...@wwwdotorg.org> wrote: > >> On 11/20/2013 09:42 AM, Alban Bedel wrote: >>> The CPU complex reset masks are not matching with the datasheet for >>> the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20 >>> and T30 the register consist of groups of 4 bits, with one bit for >>> each CPU core. On T20 the 2 high bits of each group are always stubbed >>> as there is only 2 cores. >> >> This looks correct to me. Given this problem, it's surprising that >> reset_A9_cpu() was operating correctly, and that secondary CPUs were >> coming out of reset OK later. What testing has this had (which SoCs and >> boards)? > > I only tested it on T30 using our Tamonten NG board.
OK, I tested on all Tegra SoCs, and everything (including a CPU hotplug test in a kernel once booted with the new U-Boot) still works, so, Tested-by: Stephen Warren <swr...@nvidia.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
