On Wed, Nov 20, 2013 at 11:27:59PM -0600, Scott Wood wrote: > From: Prabhakar Kushwaha <prabha...@freescale.com> > > nand_ecclayout is present in mtd.h at Linux. > Move this structure to mtd.h to comply with Linux. > > Also, increase the ecc placement locations to 640 to suport device having > writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone > up to 640 bytes and consequently the maximum ecc placement locations have > also gone up to 640. > > Changes from Prabhabkar's version (squashed into one patch to preserve > bisectability): > - Added _LARGE to MTD_MAX_*_ENTRIES > > This makes the names match current Linux source, and resolves > a conflict between > http://patchwork.ozlabs.org/patch/280488/ > and > http://patchwork.ozlabs.org/patch/284513/ > > The former was posted first and is closer to matching Linux, but > unlike Linux it does not add _LARGE to the names. The second adds > _LARGE to one of the names, and depends on it in a subsequent patch > (http://patchwork.ozlabs.org/patch/284512/). > > - Made max oobfree/eccpos configurable, and used this on tricorder, > alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build > for me without doing so, due to a size increase). > > On tricorder SPL, this saves 2576 bytes (and makes the SPL build > again) versus the new default of 640 eccpos and 32 oobfree, and > saves 336 bytes versus the old default of 128 eccpos and 8 oobfree. [snip] > diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h > index 9460be3..2f53407 100644 > --- a/include/configs/ASH405.h > +++ b/include/configs/ASH405.h > @@ -143,6 +143,8 @@ > > #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad > blocks */ > #define CONFIG_SYS_NAND_QUIET 1 > +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 > +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 > > /*----------------------------------------------------------------------- > * PCI stuff > diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h > index c751144..9ad9402 100644 > --- a/include/configs/MPC8572DS.h > +++ b/include/configs/MPC8572DS.h > @@ -322,6 +322,8 @@ > #define CONFIG_CMD_NAND 1 > #define CONFIG_NAND_FSL_ELBC 1 > #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) > +#define CONFIG_SYS_NAND_MAX_OOBFREE 5 > +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 > > /* NAND boot: 4K NAND loader config */ > #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 > diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h > index 3777ccb..c96df54 100644 > --- a/include/configs/T4240QDS.h > +++ b/include/configs/T4240QDS.h > @@ -229,6 +229,8 @@ unsigned long get_board_ddr_clk(void); > #define CONFIG_CMD_NAND > > #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) > +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 > +#define CONFIG_SYS_NAND_MAX_ECCPOS 256 > > #if defined(CONFIG_NAND) > #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT > diff --git a/include/configs/alpr.h b/include/configs/alpr.h > index 2bf1986..61fdeba 100644 > --- a/include/configs/alpr.h > +++ b/include/configs/alpr.h > @@ -324,6 +324,8 @@ > #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE + 0, > CONFIG_SYS_NAND_BASE + 2, \ > CONFIG_SYS_NAND_BASE + 4, > CONFIG_SYS_NAND_BASE + 6 } > #define CONFIG_SYS_NAND_QUIET_TEST 1 /* don't warn upon unknown NAND > flash */ > +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 > +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 > > /*----------------------------------------------------------------------- > * External Bus Controller (EBC) Setup > diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h > index d57394e..590eab7 100644 > --- a/include/configs/tricorder.h > +++ b/include/configs/tricorder.h > @@ -140,6 +140,8 @@ > /* devices */ > #define CONFIG_NAND_OMAP_BCH8 > #define CONFIG_BCH > +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 > +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 > > /* commands to include */ > #include <config_cmd_default.h>
So, cam_enc_4xx (ARM) also fails to build with ELDK 5.2.1 (is fine with newer toolchains), so I dug into this patch to shrink things there. But looking above, are all of these right? It seems like generally we say OOBFREE=2, ECCPOS=56, except once you say OOBFREE=5 ECCPOS=56 and once OOBFREE=5 ECCPOS=256. Are these really right and just 'odd' due to the chip used? Also, Heiko, what should these values be for cam_enc_4xx? Thanks! -- Tom
signature.asc
Description: Digital signature
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
