On Thu, Nov 07, 2013 at 04:16:40PM -0500, Tom Rini wrote:
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> On 11/07/2013 04:12 PM, Vaibhav Bedia wrote:
> > Hi Tom,
> >
> > On Thu, Nov 7, 2013 at 11:42 AM, Tom Rini <tr...@ti.com> wrote:
> >> Based on the definitive guide to EMIF configuration[1] certain registers
> >> that we have been modifying (and are documented registers) should be
> >> left in their reset values rather than modified. This has been tested
> >> on AM335x GP EVM and Beaglebone White.
> >>
> >
> > [...]
> [snip]
> >> @@ -198,11 +188,6 @@ void sdram_init(void)
> >> config_dmm(&evm_lisa_map_regs);
> >>
> >> #ifdef CONFIG_TI816X_EVM_DDR2
> >> - ddr2_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
> >> - ddr2_ctrl.cmd0dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
> >> - ddr2_ctrl.cmd1dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
> >> - ddr2_ctrl.cmd2dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
> >> -
> >> if (CONFIG_TI816X_USE_EMIF0) {
> >> ddr2_emif0_regs.emif_ddr_phy_ctlr_1 =
> >> (get_cpu_rev() == 0x1 ? 0x0000010B : 0x0000030B);
> >> @@ -217,8 +202,6 @@ void sdram_init(void)
> >> #endif
> >>
> >> #ifdef CONFIG_TI816X_EVM_DDR3
> >> - ddr3_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
> >> -
> >
> > From a quick glance it looks like at least earlier variants of TI81xx
> > used these registers to work around some bugs? This might end up
> > breaking those. Note that TI81xx DDR frequencies are much higher
> > compared to AM335x so issues related to this might not show up
> > right now.
>
> It's an open question on if TI81xx needs these set or was simply also
> setting them for historical reasons (and in turn was inherited by am335x).
I will doublecheck on my early TI8148...out of time today but tomorrow.
-Matt
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