On Wed, Nov 6, 2013 at 8:54 AM, Lokesh Vutla <lokeshvu...@ti.com> wrote:
> On Wednesday 06 November 2013 06:32 PM, Vaibhav Bedia wrote:
>> On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla <lokeshvu...@ti.com> wrote:
>>> GP EVM has 1GB DDR3 attached(Part no: MT47H128M16RT-187E:C).
>>> Adding details for the same.
>>> Below is the brief description of DDR3 init sequence(SW leveling):
>>> -> Enable VTT regulator
>>> -> Configure VTP
>>> -> Configure DDR IO settings
>>> -> Disable initialization and refreshes until EMIF registers are programmed.
>>> -> Program Timing registers
>>> -> Program leveling registers
>>> -> Program PHY control and Temp alert and ZQ config registers.
>>
>> Temp alert? Is that really relevant here?
> Yes, Need to configure all the emif registers before accessing SDRAM.

Ok. What's done on an AM437x system when the temp goes beyond a threshold?

Regards,
Vaibhav
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