Hi Sricharan, 2013/10/16 Sricharan R <r.sricha...@ti.com>: > Hi, > > On Wednesday 16 October 2013 06:03 PM, Tom Rini wrote: >> -----BEGIN PGP SIGNED MESSAGE----- >> Hash: SHA1 >> >> On 10/16/2013 07:34 AM, Enric Balletbo Serra wrote: >>> Hi Sricharan, >>> >>> 2013/10/16 Sricharan R <r.sricha...@ti.com>: >>>> Changing the IO settings to turn on VREF_DQ and >>>> disable weak pullup for DQS/nDQS. >>>> >>>> Signed-off-by: Sricharan R <r.sricha...@ti.com> >>>> --- >>>> arch/arm/include/asm/arch-omap5/omap.h | 4 ++-- >>>> 1 file changed, 2 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/arch/arm/include/asm/arch-omap5/omap.h >>>> b/arch/arm/include/asm/arch-omap5/omap.h >>>> index 414d37a..3c2306f 100644 >>>> --- a/arch/arm/include/asm/arch-omap5/omap.h >>>> +++ b/arch/arm/include/asm/arch-omap5/omap.h >>>> @@ -145,9 +145,9 @@ struct s32ktimer { >>>> #define DDR_IO_2_VREF_CELLS_DDR3_VALUE 0x0 >>>> >>>> #define DDR_IO_I_40OHM_SR_SLOWEST_WD_DQ_NO_PULL_DQS_NO_PULL_ES2 0x7C7C7C7C >>>> -#define DDR_IO_I_40OHM_SR_FAST_WD_DQ_NO_PULL_DQS_NO_PULL_ES2 0x64656465 >>>> +#define DDR_IO_I_40OHM_SR_FAST_WD_DQ_NO_PULL_DQS_NO_PULL_ES2 0x64646464 >>>> #define DDR_IO_0_VREF_CELLS_DDR3_VALUE_ES2 0xBAE8C631 >>>> -#define DDR_IO_1_VREF_CELLS_DDR3_VALUE_ES2 0xB46318D8 >>>> +#define DDR_IO_1_VREF_CELLS_DDR3_VALUE_ES2 0xBC6318DC >>>> #define DDR_IO_2_VREF_CELLS_DDR3_VALUE_ES2 0x84210000 >>>> >>>> #define EFUSE_1 0x45145100 >>> Sorry for my ignorance, I just want to know more ... >>> >>> What's the purpose of this patch ? Solves any DDR3 problem on OMAP5 ? >>> Improves ? >> I suspect I know what this is about, but can we please have a more >> verbose commit message here? > > Above the two changes improved DDR3 stability at extended temperature > ranges above 83C. > > 1) The first change from 0x64656465 to 0x64646464 removes the weak pull > on the DQ lines. Otherwise the DQ line was not staying at Vref when IDLE > (retreats > to ground) and because of this there were extra transitions and noise. > > 2) The second change was to enable internal VREF_DQ_OUT which otherwise was > at 0V. > > Hope this helps. BTW, i will repost with a better commit log. Sorry. > > Regards, > Sricharan >
Many thanks for the explanation. Best regards, Enric _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot