Current sf uses PAGE_PROGRAM command for write and FAST_READ,
SLOW_READ, DUAL_READ and DUAL_IO_READ commands for read this
patch adds support to use the quad read/write commands.
- QUAD_PAGE_PROGRAM
- QUAD_OUTPUT_FAST
Signed-off-by: Jagannadha Sutradharudu Teki <jaga...@xilinx.com>
---
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
doc/SPI/status.txt | 5 +-
drivers/mtd/spi/spi_flash_ops.c | 2 +-
drivers/mtd/spi/spi_flash_probe.c | 174 +++++++++++++++++++++-----------------
drivers/spi/spi.c | 1 +
include/spi.h | 2 +
include/spi_flash.h | 17 +++-
6 files changed, 119 insertions(+), 82 deletions(-)
diff --git a/doc/SPI/status.txt b/doc/SPI/status.txt
index cca3ae4..e84911d 100644
--- a/doc/SPI/status.txt
+++ b/doc/SPI/status.txt
@@ -11,13 +11,14 @@ SPI FLASH (drivers/mtd/spi):
- spi_flash.c: SPI flash interface, which interacts controller driver.
- Common probe support for all supported flash vendors except, ramtron.
- Extended read commands support(Array slow/fast, dual output fast, dual IO
fast)
+- Quad Page Program support.
+- Quad Read support(quad fast read, quad IO read)
SPI DRIVERS (drivers/spi):
-
TODO:
-- Quad Page Program support.
-- Quad Read support(quad fast read, quad IO read)
+- Quad Read support(quad IO read)
- Dual flash connection topology support(accessing two spi flash memories with
single cs)
- Banking support on dual flash connection topology.
- Need proper cleanups on spi_flash and drivers.
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index 9fd1d6b..59127f8 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -200,7 +200,7 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32
offset,
page_size = flash->page_size;
- cmd[0] = CMD_PAGE_PROGRAM;
+ cmd[0] = flash->write_cmd;
for (actual = 0; actual < len; actual += chunk_len) {
#ifdef CONFIG_SPI_FLASH_BAR
u8 bank_sel;
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index e08d66e..30ef85c 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -23,6 +23,12 @@ static const u32 spi_read_cmds_array[] = {
CMD_READ_ARRAY_FAST,
CMD_READ_DUAL_OUTPUT_FAST,
CMD_READ_DUAL_IO_FAST,
+ CMD_READ_QUAD_OUTPUT_FAST,
+};
+
+static const u32 spi_write_cmds_array[] = {
+ CMD_PAGE_PROGRAM,
+ CMD_QUAD_PAGE_PROGRAM,
};
/*
@@ -34,6 +40,7 @@ static const u32 spi_read_cmds_array[] = {
* @sector_size: Sector size of this device
* @nr_sectors: No.of sectors on this device
* @rd_cmd: Read command
+ * @wr_cmd: Write command
* @flags: Importent param, for flash specific behaviour
*/
struct spi_flash_params {
@@ -43,103 +50,104 @@ struct spi_flash_params {
u32 sector_size;
u32 nr_sectors;
u8 rd_cmd;
+ u8 wr_cmd;
u16 flags;
};
static const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, 0,
SECT_4K},
- {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, 0,
SECT_4K},
- {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0,
SECT_4K},
- {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, 0,
SECT_4K},
- {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, 0,
SECT_4K},
- {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, 0,
SECT_4K},
- {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, 0,
SECT_4K},
+ {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, 0,
0, SECT_4K},
+ {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, 0,
0, SECT_4K},
+ {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0,
0, SECT_4K},
+ {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, 0,
0, SECT_4K},
+ {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, 0,
0, SECT_4K},
+ {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, 0,
0, SECT_4K},
+ {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, 0,
0, SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_EON /* EON */
- {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0,
0},
- {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, 0,
SECT_4K},
- {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0,
0},
+ {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0,
0, 0},
+ {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, 0,
0, SECT_4K},
+ {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0,
0, 0},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, 0,
SECT_4K},
- {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, 0,
SECT_4K},
+ {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, 0,
0, SECT_4K},
+ {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, 0,
0, SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0,
0},
- {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0,
0},
- {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0,
0},
- {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0,
0},
- {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0,
0},
- {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0,
0},
- {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0,
0},
+ {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0,
0, 0},
+ {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0,
0, 0},
+ {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0,
0, 0},
+ {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0,
0, 0},
+ {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0,
0, 0},
+ {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0,
0, 0},
+ {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0,
0, 0},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0,
0},
- {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0,
0},
- {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0,
0},
- {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0,
0},
- {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_CMD_FULL,
0},
- {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_CMD_FULL,
0},
- {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_CMD_FULL,
0},
- {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_CMD_FULL,
0},
- {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_CMD_FULL,
0},
- {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_CMD_FULL,
0},
- {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_CMD_FULL,
0},
+ {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0,
0, 0},
+ {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0,
0, 0},
+ {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0,
0, 0},
+ {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0,
0, 0},
+ {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_CMD_FULL,
WR_CMD_FULL, 0},
+ {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_CMD_FULL,
WR_CMD_FULL, 0},
+ {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_CMD_FULL,
WR_CMD_FULL, 0},
+ {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_CMD_FULL,
WR_CMD_FULL, 0},
+ {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_CMD_FULL,
WR_CMD_FULL, 0},
+ {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_CMD_FULL,
WR_CMD_FULL, 0},
+ {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_CMD_FULL,
WR_CMD_FULL, 0},
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
- {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0,
0},
- {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0,
0},
- {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0,
0},
- {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0,
0},
- {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0,
0},
- {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0,
0},
- {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0,
0},
- {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0,
0},
- {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_CMD_FULL,
SECT_4K},
- {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_CMD_FULL,
SECT_4K},
- {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_CMD_FULL,
SECT_4K},
- {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_CMD_FULL,
SECT_4K},
- {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_CMD_FULL,
SECT_4K},
- {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_CMD_FULL,
SECT_4K},
- {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_CMD_FULL,
SECT_4K},
- {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_CMD_FULL,
SECT_4K},
- {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_CMD_FULL,
E_FSR | SECT_4K},
- {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_CMD_FULL,
E_FSR | SECT_4K},
- {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_CMD_FULL,
E_FSR | SECT_4K},
- {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_CMD_FULL,
E_FSR | SECT_4K},
+ {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0,
0, 0},
+ {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0,
0, 0},
+ {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0,
0, 0},
+ {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0,
0, 0},
+ {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0,
0, 0},
+ {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0,
0, 0},
+ {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0,
0, 0},
+ {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0,
0, 0},
+ {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_CMD_FULL,
WR_CMD_FULL, E_FSR | SECT_4K},
+ {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_CMD_FULL,
WR_CMD_FULL, E_FSR | SECT_4K},
+ {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_CMD_FULL,
WR_CMD_FULL, E_FSR | SECT_4K},
+ {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_CMD_FULL,
WR_CMD_FULL, E_FSR | SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
- {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, 0,
SECT_4K | SST_WP},
- {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, 0,
SECT_4K | SST_WP},
- {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, 0,
SECT_4K | SST_WP},
- {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, 0,
SECT_4K | SST_WP},
- {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, 0
SECT_4K},
- {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, 0,
SECT_4K | SST_WP},
- {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, 0,
SECT_4K | SST_WP},
- {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, 0,
SECT_4K | SST_WP},
- {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, 0,
SECT_4K | SST_WP},
- {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, 0,
SECT_4K | SST_WP},
+ {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, 0,
0, SECT_4K | SST_WP},
+ {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, 0,
0, SECT_4K | SST_WP},
+ {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, 0,
0, SECT_4K | SST_WP},
+ {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, 0,
0, SECT_4K | SST_WP},
+ {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, 0,
0, SECT_4K},
+ {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, 0,
0, SECT_4K | SST_WP},
+ {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, 0,
0, SECT_4K | SST_WP},
+ {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, 0,
0, SECT_4K | SST_WP},
+ {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, 0,
0, SECT_4K | SST_WP},
+ {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, 0,
0, SECT_4K | SST_WP},
#endif
#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
- {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0,
0},
- {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0,
0},
- {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0,
0},
- {"W25X40", 0xef3013, 0x0, 4 * 1024, 128, 0,
SECT_4K},
- {"W25X16", 0xef3015, 0x0, 4 * 1024, 512, 0,
SECT_4K},
- {"W25X32", 0xef3016, 0x0, 4 * 1024, 1024, 0,
SECT_4K},
- {"W25X64", 0xef3017, 0x0, 4 * 1024, 2048, 0,
SECT_4K},
- {"W25Q80BL", 0xef4014, 0x0, 4 * 1024, 256, RD_CMD_FULL,
SECT_4K},
- {"W25Q16CL", 0xef4015, 0x0, 4 * 1024, 512, RD_CMD_FULL,
SECT_4K},
- {"W25Q32BV", 0xef4016, 0x0, 4 * 1024, 1024, RD_CMD_FULL,
SECT_4K},
- {"W25Q64CV", 0xef4017, 0x0, 4 * 1024, 2048, RD_CMD_FULL,
SECT_4K},
- {"W25Q128BV", 0xef4018, 0x0, 4 * 1024, 4096, RD_CMD_FULL,
SECT_4K},
- {"W25Q256", 0xef4019, 0x0, 4 * 1024, 8192, RD_CMD_FULL,
SECT_4K},
- {"W25Q80BW", 0xef5014, 0x0, 4 * 1024, 256, RD_CMD_FULL,
SECT_4K},
- {"W25Q16DW", 0xef6015, 0x0, 4 * 1024, 512, RD_CMD_FULL,
SECT_4K},
- {"W25Q32DW", 0xef6016, 0x0, 4 * 1024, 1024, RD_CMD_FULL,
SECT_4K},
- {"W25Q64DW", 0xef6017, 0x0, 4 * 1024, 2048, RD_CMD_FULL,
SECT_4K},
- {"W25Q128FW", 0xef6018, 0x0, 4 * 1024, 4096, RD_CMD_FULL,
SECT_4K},
+ {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0,
0, 0},
+ {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0,
0, 0},
+ {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0,
0, 0},
+ {"W25X40", 0xef3013, 0x0, 4 * 1024, 128, 0,
0, SECT_4K},
+ {"W25X16", 0xef3015, 0x0, 4 * 1024, 512, 0,
0, SECT_4K},
+ {"W25X32", 0xef3016, 0x0, 4 * 1024, 1024, 0,
0, SECT_4K},
+ {"W25X64", 0xef3017, 0x0, 4 * 1024, 2048, 0,
0, SECT_4K},
+ {"W25Q80BL", 0xef4014, 0x0, 4 * 1024, 256, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q16CL", 0xef4015, 0x0, 4 * 1024, 512, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q32BV", 0xef4016, 0x0, 4 * 1024, 1024, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q64CV", 0xef4017, 0x0, 4 * 1024, 2048, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q128BV", 0xef4018, 0x0, 4 * 1024, 4096, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q256", 0xef4019, 0x0, 4 * 1024, 8192, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q80BW", 0xef5014, 0x0, 4 * 1024, 256, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q16DW", 0xef6015, 0x0, 4 * 1024, 512, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q32DW", 0xef6016, 0x0, 4 * 1024, 1024, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q64DW", 0xef6017, 0x0, 4 * 1024, 2048, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
+ {"W25Q128FW", 0xef6018, 0x0, 4 * 1024, 4096, RD_CMD_FULL,
WR_CMD_FULL, SECT_4K},
#endif
/*
* Note:
@@ -219,6 +227,16 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
flash->read_cmd = flash->spi->rd_cmd;
}
+ /* Look for the fastest write cmd */
+ cmd = fls(params->wr_cmd & flash->spi->wr_cmd);
+ if (cmd) {
+ cmd = spi_write_cmds_array[cmd - 1];
+ flash->write_cmd = cmd;
+ } else {
+ /* Go for controller supported command */
+ flash->write_cmd = flash->spi->wr_cmd;
+ }
+
/* Compute erase sector and command */
if (params->flags & SECT_4K) {
flash->erase_cmd = CMD_ERASE_4K;
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 0ac9fab..d7bd144 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -22,6 +22,7 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int
bus,
slave->bus = bus;
slave->cs = cs;
slave->rd_cmd = CMD_READ_ARRAY_FAST;
+ slave->wr_cmd = CMD_PAGE_PROGRAM;
}
return ptr;
diff --git a/include/spi.h b/include/spi.h
index 093847e..e1a5ce8 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -41,12 +41,14 @@
* max_write_size: If non-zero, the maximum number of bytes which can
* be written at once, excluding command bytes.
* rd_cmd: Read command.
+ * wr_cmd: Write command.
*/
struct spi_slave {
unsigned int bus;
unsigned int cs;
unsigned int max_write_size;
u8 rd_cmd;
+ u8 wr_cmd;
};
/*-----------------------------------------------------------------------
diff --git a/include/spi_flash.h b/include/spi_flash.h
index e630913..4724eee 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -27,21 +27,34 @@
#define SECT_32K (1 << 1)
#define E_FSR (1 << 2)
+/* Write commands */
+#define CMD_PAGE_PROGRAM 0x02
+#define CMD_QUAD_PAGE_PROGRAM 0x32
+
+enum spi_write_cmds {
+ PAGE_PROGRAM = 1 << 0,
+ QUAD_PAGE_PROGRAM = 1 << 1,
+};
+
+#define WR_CMD_FULL PAGE_PROGRAM | QUAD_PAGE_PROGRAM
+
/* Read commands */
#define CMD_READ_ARRAY_SLOW 0x03
#define CMD_READ_ARRAY_FAST 0x0b
#define CMD_READ_DUAL_OUTPUT_FAST 0x3b
#define CMD_READ_DUAL_IO_FAST 0xbb
+#define CMD_READ_QUAD_OUTPUT_FAST 0x6b
enum spi_read_cmds {
ARRAY_SLOW = 1 << 0,
ARRAY_FAST = 1 << 1,
DUAL_OUTPUT_FAST = 1 << 2,
DUAL_IO_FAST = 1 << 3,
+ QUAD_OUTPUT_FAST = 1 << 4,
};
#define RD_CMD_FULL ARRAY_SLOW | ARRAY_FAST | DUAL_OUTPUT_FAST | \
- DUAL_IO_FAST
+ DUAL_IO_FAST | QUAD_OUTPUT_FAST
/* SST specific macros */
#ifdef CONFIG_SPI_FLASH_SST
@@ -65,6 +78,7 @@ enum spi_read_cmds {
* @poll_cmd: Poll cmd - for flash erase/program
* @erase_cmd: Erase cmd 4K, 32K, 64K
* @read_cmd: Read cmd SA, FA, DOF, DIOF
+ * @write_cmd: Write cmd PP, QPP
* @memory_map: Address of read-only SPI flash access
* @read: Flash read ops
* @write: Flash write ops
@@ -86,6 +100,7 @@ struct spi_flash {
u8 poll_cmd;
u8 erase_cmd;
u8 read_cmd;
+ u8 write_cmd;
void *memory_map;
int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
--
1.8.3
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