On Wed, Jul 31, 2013 at 04:50:58PM +0900, Nobuhiro Iwamatsu wrote: > This patch adds a driver for Renesas SoC's Queued SPI bus. > This supports with 8 bits per transfer to use with SPI flash. > > Signed-off-by: Kouei Abe <kouei.abe...@renesas.com> > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu...@renesas.com> [snip] > +/* > + * drivers/spi/sh_qspi.c > + * SH QSPI driver [snip]
Since "QSPI" also means "Quad SPI", can you please do "SH QSPI (Queued SPI) driver" here and in the header, so it's clear what Q this is? > + /* QSPI initialize */ > + sh_qspi_writeb(0x08, &ss->regs->spcr); Can you please #define all of these magic numbers? Thanks. -- Tom
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