Samsung SoC is supported the WIDE8, even if Controller version is v2.0.
So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC.
Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.p...@samsung.com>
---
drivers/mmc/s5p_sdhci.c | 4 +++-
drivers/mmc/sdhci.c | 13 +++++++------
include/sdhci.h | 3 +++
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index e50ff92..97e153e 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -84,7 +84,7 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
- SDHCI_QUIRK_WAIT_SEND_CMD;
+ SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
@@ -93,6 +93,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host->index = index;
host->host_caps = MMC_MODE_HC;
+ if (bus_width == 8)
+ host->host_caps |= MMC_MODE_8BIT;
return add_sdhci(host, 52000000, 400000);
}
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index c5631bf..9bf3052 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -270,7 +270,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int
clock)
if (clock == 0)
return 0;
- if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) {
+ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
/* Version 3.00 divisors must be a multiple of 2. */
if (mmc->f_max <= clock)
div = 1;
@@ -363,10 +363,11 @@ void sdhci_set_ios(struct mmc *mmc)
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
if (mmc->bus_width == 8) {
ctrl &= ~SDHCI_CTRL_4BITBUS;
- if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300)
+ if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
+ (host->quirks & SDHCI_QUIRK_USE_WIDE8))
ctrl |= SDHCI_CTRL_8BITBUS;
} else {
- if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
ctrl &= ~SDHCI_CTRL_8BITBUS;
if (mmc->bus_width == 4)
ctrl |= SDHCI_CTRL_4BITBUS;
@@ -453,7 +454,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
if (max_clk)
mmc->f_max = max_clk;
else {
- if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
mmc->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK)
>> SDHCI_CLOCK_BASE_SHIFT;
else
@@ -468,7 +469,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
if (min_clk)
mmc->f_min = min_clk;
else {
- if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300)
+ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
mmc->f_min = mmc->f_max / SDHCI_MAX_DIV_SPEC_300;
else
mmc->f_min = mmc->f_max / SDHCI_MAX_DIV_SPEC_200;
@@ -486,7 +487,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
mmc->voltages |= host->voltages;
mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
- if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) {
+ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
if (caps & SDHCI_CAN_DO_8BIT)
mmc->host_caps |= MMC_MODE_8BIT;
}
diff --git a/include/sdhci.h b/include/sdhci.h
index cffbe53..f3f8219 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -208,6 +208,8 @@
#define SDHCI_SPEC_200 1
#define SDHCI_SPEC_300 2
+#define SDHCI_GET_VERSION(x) (x->version & SDHCI_SPEC_VER_MASK)
+
/*
* End of controller registers.
*/
@@ -226,6 +228,7 @@
#define SDHCI_QUIRK_NO_CD (1 << 5)
#define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6)
#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1 << 7)
+#define SDHCI_QUIRK_USE_WIDE8 (1 << 8)
/* to make gcc happy */
struct sdhci_host;
--
1.7.9.5
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