On 7/15/2013 1:20 PM, Albert ARIBAUD wrote:
Hi Troy,
On Mon, 15 Jul 2013 10:39:54 -0700, Troy Kisky
<troy.ki...@boundarydevices.com> wrote:
Besides, Marek and I had in fact investigated barriers, adding some as
I did in times past in mvgbe.c, and fiddling with the one already in
dcache_flush_range(). None of this had any effect.
You tried adding a dsb() to dcache_flush_range()?
That should have fixed the problem as well.
There already was a memory barrier -- the only one kind known bu
ARM926J-S, which is a write buffer(s) drain -- and no, it should not
have fixed the problem (and did not), because the issue is not about
pushing the transactions out of the CPU soon enough; it is about having
the EMI perform them before it passes our 'go' command to the ENET DMA.
Thanks for straightening me out. My back just popped a couple of times.
Troy
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