This patch support the soft reset at s3c6410

Signed-off-by: Minkyu Kang <mk7.k...@samsung.com>
---
 cpu/arm1176/cpu.c                |   16 ----------------
 cpu/arm1176/s3c64xx/interrupts.c |   15 +++++++++++++++
 include/s3c6400.h                |    5 +++++
 3 files changed, 20 insertions(+), 16 deletions(-)

diff --git a/cpu/arm1176/cpu.c b/cpu/arm1176/cpu.c
index 1e94f7d..fe41290 100644
--- a/cpu/arm1176/cpu.c
+++ b/cpu/arm1176/cpu.c
@@ -107,22 +107,6 @@ int cleanup_before_linux (void)
        return 0;
 }
 
-
-/* * reset the cpu by setting up the watchdog timer and let him time out */
-void reset_cpu (ulong ignored)
-{
-       printf("reset... \n\n\n");
-       SW_RST_REG = 0x6400;
-       /* loop forever and wait for reset to happen */
-       while (1) {
-               if (serial_tstc()) {
-                       serial_getc();
-                       break;
-               }
-       }
-       /*NOTREACHED*/
-}
-
 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
        disable_interrupts ();
diff --git a/cpu/arm1176/s3c64xx/interrupts.c b/cpu/arm1176/s3c64xx/interrupts.c
index 83f3806..e68f3ae 100644
--- a/cpu/arm1176/s3c64xx/interrupts.c
+++ b/cpu/arm1176/s3c64xx/interrupts.c
@@ -175,3 +175,18 @@ void udelay(unsigned long usec)
        while (get_ticks() < tmp)/* loop till event */
                 /*NOP*/;
 }
+
+/* reset the cpu by setting up the watchdog timer and let him time out */
+void reset_cpu(ulong ignored)
+{
+       printf("reset... \n\n\n");
+       SW_RST_REG = SW_RST_CODE;
+       /* loop forever and wait for reset to happen */
+       while (1) {
+               if (serial_tstc()) {
+                       serial_getc();
+                       break;
+               }
+       }
+       /*NOTREACHED*/
+}
diff --git a/include/s3c6400.h b/include/s3c6400.h
index fd3e99b..4bf5a7f 100644
--- a/include/s3c6400.h
+++ b/include/s3c6400.h
@@ -203,6 +203,11 @@
 #define INF_REG6       (ELFIN_CLOCK_POWER_BASE + INF_REG6_OFFSET)
 #define INF_REG7       (ELFIN_CLOCK_POWER_BASE + INF_REG7_OFFSET)
 
+#if defined(CONFIG_S3C6410)
+#define SW_RST_CODE    0x6410
+#else
+#define SW_RST_CODE    0x6400
+#endif
 
 /*
  * GPIO
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