Dear Mike Dunn, > On the xscale, the icache must be invalidated and the write buffers drained > after writing code over the data bus, even if the caches are disabled. > Tested on the pxa270. > > Signed-off-by: Mike Dunn <miked...@newsguy.com> > --- > arch/arm/lib/relocate.S | 9 +++++++++ > 1 files changed, 9 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S > index 4446da9..eedf314 100644 > --- a/arch/arm/lib/relocate.S > +++ b/arch/arm/lib/relocate.S > @@ -92,6 +92,15 @@ fixnext: > > relocate_done: > > +#ifdef __XSCALE__ > + /* > + * On xscale, icache must be invalidated and write buffers drained, > + * even with cache disabled - 4.2.7 of xscale core developer's manual > + */ > + mcr p15, 0, r0, c7, c7, 0 /* invalidate icache */ > + mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */ > +#endif > + > /* ARMv4- don't know bx lr but the assembler fails to see that */ > > #ifdef __ARM_ARCH_4__
Acked-by: Marek Vasut <ma...@denx.de> Albert, do you want me to pick these or will you? Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
