On 05/23/2013 12:52 PM, Albert ARIBAUD wrote:
Hi Andre,
On Mon, 6 May 2013 15:17:45 +0200, Andre Przywara
<andre.przyw...@linaro.org> wrote:
A prerequisite for using virtualization is to be in HYP mode, which
requires the CPU to be in non-secure state.
Introduce a monitor handler routine which switches the CPU to
non-secure state by setting the NS and associated bits.
According to the ARM ARM this should not be done in SVC mode, so we
ARM *TRM*, I suspect. Also, as there are a lot of ARM TRMs, if there is
a more precise reference, please provide it.
Albert,
my apologies for the confusion. As Peter already pointed out, the
reference is really in the architectural manual. I just picked up that
"ARM ARM" phrase lately and assumed that this is common knowledge. I
will change it to something more precise in the next revision.
Thanks,
Andre.
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