On Mon, May 13, 2013 at 10:24:17AM -0700, Tom Warren wrote: > Allen, > > > -----Original Message----- > > From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass > > Sent: Friday, May 10, 2013 8:06 PM > > To: Allen Martin > > Cc: Tom Warren; Stephen Warren; U-Boot Mailing List > > Subject: Re: [PATCH] Tegra: clk: always use find_best_divider() for periph > > clocks > > > > On Fri, May 10, 2013 at 8:56 PM, Allen Martin <amar...@nvidia.com> wrote: > > > When adjusting peripheral clocks always use find_best_divider() > > > instead of clk_get_divider() even when a secondary divider is not > > > available. In the case where is requested clock is too slow to be > > > derived from the parent clock this allows a best effort to get close > > > to the requested clock. > > > > > > This comes up for commands like "sf" where the user can pass a clock > > > speed on the command line or "sspi" where the clock is hardcoded to > > > 1MHz, but the Tegra114 SPI controller can't go that low. > > Did you test all other periphs and check their config'd clocks to make sure > this doesn't affect anything else negatively? This proc is pretty universal > (called by clock_start_periph_pll, which is used by MMC/I2C/USB/display > drivers). >
Testing done: tegra20 seaboard: usb read/write i2c read emmc read sdcard read/write lcd uart read/write tegra20 trimslice: spi read uart read/write tegra30 cardhu: spi read/write uart read/write i2c read sdcard read/write emmc read tegra114 dalmore: iwc read sdcard read/write emmc read uart read/write -Allen -- nvpublic _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
