This patch adds pmic_set_voltage api in max77686.
As the name suggests, this api is required for switching
voltage from one level to another.
Signed-off-by: Akshay Saraswat <aksha...@samsung.com>
---
drivers/power/pmic/pmic_max77686.c | 61 ++++++++++++++++++++++++++++++++++++++
include/power/max77686_pmic.h | 12 ++++++++
include/power/pmic.h | 1 +
3 files changed, 74 insertions(+)
diff --git a/drivers/power/pmic/pmic_max77686.c
b/drivers/power/pmic/pmic_max77686.c
index 7fcb4c0..d8782f8 100644
--- a/drivers/power/pmic/pmic_max77686.c
+++ b/drivers/power/pmic/pmic_max77686.c
@@ -77,3 +77,64 @@ int pmic_init(unsigned char bus)
return 0;
}
+
+int pmic_set_voltage(u32 new_voltage)
+{
+ struct pmic *p;
+ u32 read_data, volt_level, ret;
+
+ p = pmic_get("MAX77686_PMIC");
+ if (!p)
+ return -ENODEV;
+
+ /* Read BUCK2 DVS1 value */
+ ret = pmic_reg_read(p, MAX77686_REG_PMIC_BUCK2DVS1, &read_data);
+ if (ret != 0) {
+ debug("CPUFREQ: max77686 BUCK2 DVS1 register read failed.\n");
+ return -1;
+ }
+
+ /* Calculate voltage level */
+ volt_level = new_voltage - MAX77686_BUCK2_VOL_MIN * 1000;
+
+ if (volt_level < 0) {
+ debug("CPUFREQ: Not a valid voltage level to set\n");
+ return -1;
+ }
+
+ volt_level /= MAX77686_BUCK2_VOL_DIV;
+
+ /* Update voltage level in BUCK2 DVS1 register value */
+ clrsetbits_8(&read_data,
+ MAX77686_BUCK2_VOL_BITMASK << MAX77686_BUCK2_VOL_BITPOS,
+ volt_level << MAX77686_BUCK2_VOL_BITPOS);
+
+ /* Write new value in BUCK2 DVS1 */
+ ret = pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, read_data);
+ if (ret != 0) {
+ debug("CPUFREQ: max77686 BUCK2 DVS1 register write failed.\n");
+ return -1;
+ }
+
+ /* Set ENABLE BUCK2 register bits */
+ read_data = 0;
+ ret = pmic_reg_read(p, MAX77686_BUCK2_VOL_ENADDR, &read_data);
+ if (ret != 0) {
+ debug("CPUFREQ: max77686 BUCK2 enable address read failed.\n");
+ return -1;
+ }
+
+ clrsetbits_8(&read_data,
+ (MAX77686_BUCK2_VOL_ENBITMASK
+ << MAX77686_BUCK2_VOL_ENBITPOS),
+ (MAX77686_BUCK2_VOL_ENBITON
+ << MAX77686_BUCK2_VOL_ENBITPOS));
+
+ ret = pmic_reg_write(p, MAX77686_BUCK2_VOL_ENADDR, read_data);
+ if (ret != 0) {
+ debug("CPUFREQ: max77686 BUCK2 enable address write failed.\n");
+ return -1;
+ }
+
+ return 0;
+}
diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h
index fdc7ca9..2780f17 100644
--- a/include/power/max77686_pmic.h
+++ b/include/power/max77686_pmic.h
@@ -175,6 +175,18 @@ enum {
#define MAX77686_LD05CTRL1_1_8V 0x14
/* LDO10 1.8 volt value */
#define MAX77686_LD10CTRL1_1_8V 0x14
+
+/* BUCK2 voltage parameter values */
+#define MAX77686_BUCK2_VOL_BITPOS 0x0
+#define MAX77686_BUCK2_VOL_BITMASK 0xff
+#define MAX77686_BUCK2_VOL_ENBITPOS 0x4
+#define MAX77686_BUCK2_VOL_ENBITMASK 0x3
+#define MAX77686_BUCK2_VOL_ENADDR 0x12
+#define MAX77686_BUCK2_VOL_ENBITON 0x1
+#define MAX77686_BUCK2_VOL_ENBITOFF 0x0
+#define MAX77686_BUCK2_VOL_MIN 925
+#define MAX77686_BUCK2_VOL_DIV 12500
+
/*
* MAX77686_REG_PMIC_32KHZ set to 32KH CP
* output is activated
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 1ecfc05..02f6f11 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -99,6 +99,7 @@ int pmic_probe(struct pmic *p);
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
+int pmic_set_voltage(u32 new_voltage);
#define pmic_i2c_addr (p->hw.i2c.addr)
#define pmic_i2c_tx_num (p->hw.i2c.tx_num)
--
1.8.0
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