Dear Alexey Brodkin,
In message <1357137512-8618-1-git-send-email-alexey.brod...@gmail.com> you
wrote:
> From: Alexey Brodkin <abrod...@synopsys.com>
>
> Current implementation works fine for bus width = 16 bits because we
> never get into "if" branch.
>
> If one sets width to 8 bits there will be 2 consequent data accesses
> (read/write):
> 1. Correct data access for 8-bit bus
> 2. Unconditional (and in this case incorrect) data access as if data bus
> is 16-bit wide
>
> Signed-off-by: Alexey Brodkin <abrod...@synopsys.com>
> ---
> drivers/block/systemace.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/block/systemace.c b/drivers/block/systemace.c
> index 247cf06..88561a7 100644
> --- a/drivers/block/systemace.c
> +++ b/drivers/block/systemace.c
> @@ -66,7 +66,8 @@ static void ace_writew(u16 val, unsigned off)
> writeb(val >> 8, base + off + 1);
> #endif
> }
> - out16(base + off, val);
> + else
> + out16(base + off, val);
> }
I agree with this first chunk.
> static u16 ace_readw(unsigned off)
> @@ -78,8 +79,8 @@ static u16 ace_readw(unsigned off)
> return readb(base + off) | (readb(base + off + 1) << 8);
> #endif
> }
> -
> - return in16(base + off);
> + else
> + return in16(base + off);
> }
But please drop this second one; the "else" is not necessary and adds
only unneeded nesting.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
If programming was easy, they wouldn't need something as complicated
as a human being to do it, now would they?
- L. Wall & R. L. Schwartz, _Programming Perl_
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