Dear Wolfram Sang,

> It could happen (1 out of 100 times) that NAND did not start up correctly
> after warm rebooting, so we end up with various failures or DMA timed out
> due to a stalled BCH. When resetting BCH together with GPMI, the issue
> could not be observed anymore (after 10000+ reboots). We probably need the
> consistent state already before sending commands to NAND. This behaviour
> was observed in barebox and kernel, so I assume it affects U-Boot as well.
> I chose to keep the extra reset for BCH when changing the flash layout to
> be on the safe side.
> 
> Signed-off-by: Wolfram Sang <w.s...@pengutronix.de>
[...]

Good, thanks. Ccing Scott to pick this up.

Acked-by: Marek Vasut <ma...@denx.de>

Best regards,
Marek Vasut
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