On 12/7/2012 12:57 AM, Scott Wood wrote:
On 12/06/2012 01:21:28 AM, Vipin Kumar wrote:
This patch forces to read the bad block marker from location 0 in
large page
nand devices and location 5 in small page devices.
Signed-off-by: Vipin Kumar<vipin.ku...@st.com>
Reviewed-by: Shiraz Hashim<shiraz.has...@st.com>
---
drivers/mtd/nand/fsmc_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/fsmc_nand.c
b/drivers/mtd/nand/fsmc_nand.c
index 7a61d88..bce4298 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -433,7 +433,7 @@ int fsmc_nand_init(struct nand_chip *nand)
writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
&fsmc_regs_p->attrib);
- nand->options = 0;
+ nand->options = NAND_SKIP_BBTSCAN;
#if defined(CONFIG_SYS_FSMC_NAND_16BIT)
nand->options |= NAND_BUSWIDTH_16;
#endif
I don't think this will change the bad block marker behavior -- just
whether you use a BBT. Why do you need this? Why not
NAND_USE_FLASH_BBT instead?
It's because the BootROM which is fused in the device itself (ie
non-modifiable) is going to read the bad block markers from the oob area.
Which means that anything written via u-boot is non-readable if it uses
flash bbt
-Scott
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