Signed-off-by: Mike Frysinger <vap...@gentoo.org>
---
MAINTAINERS | 1 +
MAKEALL | 1 +
Makefile | 4 +-
board/cm-bf527/.gitignore | 1 +
board/cm-bf527/Makefile | 59 ++++
board/cm-bf527/cm-bf527.c | 59 ++++
board/cm-bf527/config.mk | 32 +++
board/cm-bf527/flash-defines.h | 51 ++++
board/cm-bf527/flash.c | 589 ++++++++++++++++++++++++++++++++++++++++
board/cm-bf527/gpio.c | 74 +++++
board/cm-bf527/nand.c | 2 +
board/cm-bf527/spi_flash.c | 2 +
board/cm-bf527/u-boot.lds.S | 124 +++++++++
include/configs/cm-bf527.h | 144 ++++++++++
14 files changed, 1141 insertions(+), 2 deletions(-)
create mode 100644 board/cm-bf527/.gitignore
create mode 100644 board/cm-bf527/Makefile
create mode 100644 board/cm-bf527/cm-bf527.c
create mode 100644 board/cm-bf527/config.mk
create mode 100644 board/cm-bf527/flash-defines.h
create mode 100644 board/cm-bf527/flash.c
create mode 100644 board/cm-bf527/gpio.c
create mode 100644 board/cm-bf527/nand.c
create mode 100644 board/cm-bf527/spi_flash.c
create mode 100644 board/cm-bf527/u-boot.lds.S
create mode 100644 include/configs/cm-bf527.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 37f8118..f56fccf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -858,6 +858,7 @@ Blackfin Team <u-boot-de...@blackfin.uclinux.org>
Bluetechnix Tinyboards <bluetech...@blackfin.uclinux.org>
Blackfin Team <u-boot-de...@blackfin.uclinux.org>
+ CM-BF527 BF527
CM-BF533 BF533
CM-BF537E BF537
CM-BF548 BF548
diff --git a/MAKEALL b/MAKEALL
index 32f770e..362730a 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -789,6 +789,7 @@ LIST_blackfin=" \
bf538f-ezkit \
bf548-ezkit \
bf561-ezkit \
+ cm-bf527 \
cm-bf533 \
cm-bf537e \
cm-bf548 \
diff --git a/Makefile b/Makefile
index 7a50144..8fbc58f 100644
--- a/Makefile
+++ b/Makefile
@@ -3293,7 +3293,7 @@ BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit
bf533-ezkit bf533-stamp \
bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
# Bluetechnix tinyboards
-BFIN_BOARDS += cm-bf533 cm-bf537e cm-bf548 cm-bf561 tcm-bf537
+BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf548 cm-bf561 tcm-bf537
$(BFIN_BOARDS:%=%_config) : unconfig
@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
@@ -3456,7 +3456,7 @@ clean:
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/{integratorap,integratorcp}/u-boot.lds \
- $(obj)board/{,t}cm-bf5{33,37e,48,61}/u-boot.lds \
+ $(obj)board/{,t}cm-bf5{27,33,37e,48,61}/u-boot.lds \
$(obj)board/bf5{18f,26,27,33,37,38f,48,61}-{ez{kit,brd},stamp}/u-boot.lds \
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
diff --git a/board/cm-bf527/.gitignore b/board/cm-bf527/.gitignore
new file mode 100644
index 0000000..945f324
--- /dev/null
+++ b/board/cm-bf527/.gitignore
@@ -0,0 +1 @@
+/u-boot.lds
diff --git a/board/cm-bf527/Makefile b/board/cm-bf527/Makefile
new file mode 100644
index 0000000..f3d5b0b
--- /dev/null
+++ b/board/cm-bf527/Makefile
@@ -0,0 +1,59 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS-y := $(BOARD).o gpio.o flash.o
+COBJS-$(CONFIG_CMD_EEPROM) += spi_flash.o
+COBJS-$(CONFIG_CMD_NAND) += nand.o
+
+SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+$(obj)u-boot.lds: u-boot.lds.S
+ $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/cm-bf527/cm-bf527.c b/board/cm-bf527/cm-bf527.c
new file mode 100644
index 0000000..712f05d
--- /dev/null
+++ b/board/cm-bf527/cm-bf527.c
@@ -0,0 +1,59 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2005-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <config.h>
+#include <net.h>
+#include <netdev.h>
+#include <asm/blackfin.h>
+#include <asm/net.h>
+#include <asm/mach-common/bits/otp.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ printf("Board: Bluetechnix CM-BF527 board\n");
+ printf(" Support: http://www.bluetechnix.at/\n";);
+ return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
+ return gd->bd->bi_memsize;
+}
+
+#if defined(CONFIG_BFIN_MAC)
+void board_get_enetaddr(uchar *mac_addr)
+{
+ /* the MAC is stored in OTP memory page 0xDF */
+ uint32_t ret;
+ uint64_t otp_mac;
+
+ ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
+ if (!(ret & OTP_MASTER_ERROR)) {
+ uchar *otp_mac_p = (uchar *)&otp_mac;
+
+ for (ret = 0; ret < 6; ++ret)
+ mac_addr[ret] = otp_mac_p[5 - ret];
+
+ if (is_valid_ether_addr(mac_addr))
+ return;
+ }
+
+ puts("Warning: Generating 'random' MAC address\n");
+ bfin_gen_rand_mac(mac_addr);
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return bfin_EMAC_initialize(bis);
+}
+#endif
diff --git a/board/cm-bf527/config.mk b/board/cm-bf527/config.mk
new file mode 100644
index 0000000..f4a5a80
--- /dev/null
+++ b/board/cm-bf527/config.mk
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for Blackfin boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
+
+# Set some default LDR flags based on boot mode.
+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/cm-bf527/flash-defines.h b/board/cm-bf527/flash-defines.h
new file mode 100644
index 0000000..07308e5
--- /dev/null
+++ b/board/cm-bf527/flash-defines.h
@@ -0,0 +1,51 @@
+/*
+ * U-boot - flash-defines.h
+ *
+ * Copyright (c) 2005 blackfin.uclinux.org
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * based on EZ-KIT flash driver
+ * Edited by Thomas Tamandl, thomas.tama...@bluetechnix.at
+ * Edited by Jahshan Bhatti, jabhatt...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __FLASHDEFINES_H__
+#define __FLASHDEFINES_H__
+
+#include <common.h>
+
+#define FLASH_TIMEOUT 0xffffff
+#define FLASH_TIMEOUT 0xffffff
+#define FLASH_SECTOR_SIZE 0x20000
+#define MT_MANUFACT_P30 0x0089881A
+#define MT_MANUFACT_P33 0x00898820
+
+int get_codes(void);
+static int erase_block_flash(int, unsigned long);
+/* static int write_data(long lStart, long lCount, long lStride, int *pnData);
*/
+static int write_flash(long nOffset, unsigned short nValue);
+static int check_sector(unsigned short usSector);
+
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
+
+#endif
diff --git a/board/cm-bf527/flash.c b/board/cm-bf527/flash.c
new file mode 100644
index 0000000..889bdf5
--- /dev/null
+++ b/board/cm-bf527/flash.c
@@ -0,0 +1,589 @@
+/*
+ * U-boot - flash.c Flash driver for MT28F320J3FS-11
+ *
+
+ * Copyright (c) 2005 blackfin.uclinux.org
+ * This file is based on BF533EzFlash.c originally written by Analog Devices,
Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * based on EZ-KIT flash driver
+ * Edited by Thomas Tamandl, thomas.tama...@bluetechnix.at
+ * Edited by Jahshan Bhatti, jabhatt...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+#include <asm/blackfin.h>
+#include "flash-defines.h"
+
+static int write_flash(long nOffset, unsigned short nValue);
+static int erase_block_flash(int nBlock, unsigned long address);
+
+#define SWITCH_BANK \
+ do { \
+ if (memIndex >= 0x20600000) { \
+ *pPORTHIO_SET = PH9; \
+ *pPORTGIO_SET = PG11; \
+ memIndex -= 0x600000; \
+ crossed4 = 1; \
+ crossed5 = 1; \
+ } else if (memIndex >= 0x20400000) { \
+ *pPORTHIO_CLEAR = PH9; \
+ *pPORTGIO_SET = PG11; \
+ memIndex -= 0x400000; \
+ crossed5 = 1; \
+ } else if (memIndex >= 0x20200000) { \
+ *pPORTHIO_SET = PH9; \
+ *pPORTGIO_CLEAR = PG11; \
+ memIndex -= 0x200000; \
+ crossed4 = 1; \
+ } else { \
+ *pPORTHIO_CLEAR = PH9; \
+ *pPORTGIO_CLEAR = PG11; \
+ } \
+ SSYNC(); \
+ } while (0)
+
+#define SWITCH_BACK \
+ do { \
+ if (crossed4) { \
+ *pPORTHIO_CLEAR = PH9; \
+ memIndex += 0x200000; \
+ crossed4 = 0; \
+ SSYNC(); \
+ } \
+ if (crossed5) { \
+ *pPORTGIO_CLEAR = PG11; \
+ memIndex += 0x400000; \
+ crossed5 = 0; \
+ SSYNC(); \
+ } \
+ } while (0)
+
+unsigned long flash_init(void)
+{
+ int i = 0;
+ unsigned long memIndex;
+ int crossed4 = 0;
+ int crossed5 = 0;
+
+ if (CONFIG_SYS_MAX_FLASH_BANKS > 1)
+ printf("Only FLASH bank 0 will be used!");
+ flash_info[0].flash_id = FLASH_UNKNOWN;
+ if (get_codes() == MT_MANUFACT_P33)
+ flash_info[0].flash_id = MT_MANUFACT_P33;
+ else if (get_codes() == MT_MANUFACT_P30)
+ flash_info[0].flash_id = MT_MANUFACT_P30;
+ printf("Device ID of the Flash is %lx\n", flash_info[0].flash_id);
+ for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++)
+ flash_info[0].start[i] =
+ (CONFIG_SYS_FLASH_BASE + (i * FLASH_SECTOR_SIZE));
+ flash_info[0].size = CONFIG_SYS_FLASH_SIZE;
+ flash_info[0].sector_count = FLASH_TOT_SECT;
+ if (flash_info[0].flash_id == FLASH_UNKNOWN
+ && CONFIG_SYS_FLASH_SIZE == 0x200000) {
+ printf("## Unknown FLASH on Bank 0\n");
+ } else {
+ printf("Flash Memory Start 0x%x\n", CONFIG_SYS_FLASH_BASE);
+ printf("Memory Map for the Flash\n");
+ printf("0x20000000 - 0x207FFFFF Single Flash Chip (8MB)\n");
+ printf("Using PH9 and PG11 as a 2M bank switch\n");
+ printf
+ ("Please type command flinfo for information on Sectors\n");
+ *pPORTH_FER &= ~PH9;
+ *pPORTG_FER &= ~PG11;
+ *pPORTHIO_DIR |= PH9;
+ *pPORTGIO_DIR |= PG11;
+ *pPORTHIO_CLEAR = PH9;
+ *pPORTGIO_CLEAR = PG11;
+ SSYNC();
+ }
+
+ /* unlock all flash sectors (default: locked) */
+ memIndex = CONFIG_SYS_FLASH_BASE;
+
+ /* [0...2 MB] */
+ for (; memIndex < 0x20020000; memIndex += 0x4000) {
+ /* first 4 sectors a 32Kbyte */
+ *(volatile unsigned short *)memIndex = 0x0050; /* clear status
reg */
+ SSYNC();
+ *(volatile unsigned short *)memIndex = 0x0060; /* lock setup */
+ SSYNC();
+ *(volatile unsigned short *)memIndex = 0x00d0; /* lock confirm
*/
+ SSYNC();
+ *(volatile unsigned short *)memIndex = 0x00ff; /* read array
mode */
+ SSYNC();
+ }
+ for (; memIndex < 0x20800000; memIndex += 0x10000) {
+ SWITCH_BANK;
+ *(volatile unsigned short *)memIndex = 0x0050; /* clear status
reg */
+ SSYNC();
+ *(volatile unsigned short *)memIndex = 0x0060; /* lock setup */
+ SSYNC();
+ *(volatile unsigned short *)memIndex = 0x00d0; /* lock confirm
*/
+ SSYNC();
+ *(volatile unsigned short *)memIndex = 0x00ff; /* read array
mode */
+ SSYNC();
+ SWITCH_BACK;
+ }
+
+ return CONFIG_SYS_FLASH_SIZE;
+}
+
+void flash_print_info(flash_info_t *info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id) {
+ case MT_MANUFACT_P33:
+ printf("MT_MANUFACT_P33");
+ break;
+ case MT_MANUFACT_P30:
+ printf("MT_MANUFACT_P30");
+ break;
+ default:
+ printf("Unknown Vendor ");
+ break;
+ }
+ for (i = 0; i < info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf("\n ");
+ printf(" %08lX%s",
+ info->start[i], info->protect[i] ? " (RO)" : " ");
+ }
+ printf("\n");
+ return;
+}
+
+int flash_erase(flash_info_t *info, int s_first, int s_last)
+{
+ int prot, sect, i;
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect])
+ prot++;
+ }
+ if (prot)
+ printf("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ else
+ printf("\n");
+ printf("Erasing Flash locations, Please Wait\n");
+ for (i = s_first; i <= s_last; i++) {
+ if (info->protect[i] == 0) { /* not protected */
+ if (erase_block_flash(i, info->start[i]) < 0) {
+ printf("Error Sector erasing\n");
+ return ERR_INVAL;
+ } else {
+ printf("Sector %i erased.\n", i);
+ }
+ }
+ }
+ return ERR_OK;
+}
+
+int write_buff(flash_info_t *info, unsigned char *src, ulong addr, ulong cnt)
+{
+ long i = 0;
+ unsigned long ulOffset = addr - CONFIG_SYS_FLASH_BASE;
+ int nLeftover = cnt % 4;
+ int iSectors = 0;
+ int iFirst_sector = 0;
+ int iProgress = cnt / (4 * 20);
+
+ iFirst_sector = (int)(ulOffset / FLASH_SECTOR_SIZE);
+ for (iSectors = 1; (iSectors * FLASH_SECTOR_SIZE) < cnt; iSectors++) ;
+
+ printf("Bytes for programming: %li\n", cnt);
+ printf("First sector: %d\n", iFirst_sector);
+ printf("Sectors needed:%d\n", iSectors);
+
+ if (iFirst_sector + iSectors > FLASH_TOT_SECT) {
+ printf("Not enough free flash-sectors!\n");
+ return ERR_INVAL;
+ }
+
+ for (i = iFirst_sector; i < (iFirst_sector + iSectors); i++) {
+ if (check_sector(i) == ERR_NOT_ERASED)
+ printf("Sector %ld not erased\n", i);
+ /* return ERR_NOT_ERASED; */
+ }
+
+ printf("[ ]\n[");
+
+ for (i = 0; (i < cnt / 4); i++) {
+ if ((i % iProgress) == 0)
+ printf(".");
+
+ if (write_flash(ulOffset, (((int *)src)[i])) < 0) {
+ printf("Error programming the flash\n");
+ return ERR_TIMOUT;
+ }
+ ulOffset += 2;
+ if (write_flash(ulOffset, (((int *)src)[i] >> 16)) < 0) {
+ printf("Error programming the flash\n");
+ return ERR_TIMOUT;
+ }
+ ulOffset += 2;
+ }
+ if (nLeftover > 0) {
+ if (write_flash(ulOffset, ((int *)src)[i]) < 0) {
+ printf("Error programming flash\n");
+ return ERR_TIMOUT;
+ }
+ }
+ printf("]\n");
+ return ERR_OK;
+}
+
+/* assumes all bytes to be within a single bank */
+static int read_flash_chunk(char *addr, int size, char *dest)
+{
+ unsigned long memIndex;
+ int crossed4 = 0;
+ int crossed5 = 0;
+
+ memIndex = (unsigned long)addr;
+ SWITCH_BANK;
+ memcpy((void *)dest, (void *)memIndex, size);
+ SWITCH_BACK;
+ return size;
+}
+
+
+/* handles bank switching (we hope) */
+
+int read_flash(char *addr, int size, char *dest)
+{
+ int chunk;
+ int done;
+ chunk = size;
+ done = 0;
+ if (addr < (char *)0x20200000) {
+ if ((addr + size) > (char *)0x20200000) {
+ chunk = (int)((char *)0x20200000 - addr);
+ done = read_flash_chunk(addr, chunk, dest);
+ addr += chunk;
+ dest += chunk;
+ chunk = size - chunk;
+ }
+ }
+ if (addr < (char *)0x20400000) {
+ if ((addr + size) > (char *)0x20400000) {
+ chunk = (int)((char *)0x20400000 - addr);
+ done = read_flash_chunk(addr, chunk, dest);
+ addr += chunk;
+ dest += chunk;
+ chunk = size - chunk;
+ }
+ }
+ if (addr < (char *)0x20600000) {
+ if ((addr + size) > (char *)0x20600000) {
+ chunk = (int)((char *)0x20600000 - addr);
+ done = read_flash_chunk(addr, chunk, dest);
+ addr += chunk;
+ dest += chunk;
+ chunk = size - chunk;
+ }
+ }
+ done += read_flash_chunk(addr, chunk, dest);
+ return done;
+}
+
+static int check_sector(unsigned short usSector)
+{
+ long i = 0;
+ int ret;
+ unsigned short iData;
+ unsigned long memIndex;
+ int crossed4 = 0;
+ int crossed5 = 0;
+
+ printf("Checking sector %d", usSector);
+ memIndex = (unsigned long)(CONFIG_SYS_FLASH_BASE +
+ (usSector * FLASH_SECTOR_SIZE));
+
+ SWITCH_BANK;
+
+ ret = ERR_OK;
+
+ for (i = 0; i < FLASH_SECTOR_SIZE; i += 2) {
+
+ iData = *(volatile unsigned short *)memIndex;
+ if (iData != 0xFFFF) {
+ ret = ERR_NOT_ERASED;
+ break;
+ }
+ memIndex += 2;
+ }
+
+ SWITCH_BACK;
+
+ if (ret == ERR_OK) {
+ printf(" ... sector empty\n");
+ } else {
+ printf(" ... not empty!\n");
+ }
+ return ret;
+}
+
+static int write_flash(long nOffset, unsigned short nValue)
+{
+
+ unsigned long memIndex;
+ unsigned long nTimeout;
+ unsigned short status;
+ int crossed4 = 0;
+ int crossed5 = 0;
+
+ memIndex = (unsigned long)(CONFIG_SYS_FLASH_BASE + nOffset);
+ SWITCH_BANK;
+
+ *(volatile unsigned short *)memIndex = 0x0050; /* Reset status
register */
+ SSYNC();
+
+ *(volatile unsigned short *)memIndex = 0x0040;
+ SSYNC();
+
+ *(volatile unsigned short *)memIndex = (unsigned short)nValue;
+ SSYNC();
+
+ nTimeout = 0;
+ do {
+ status = *(volatile unsigned short *)memIndex;
+ nTimeout++;
+ SSYNC();
+ }
+ while (((status & 0x0080) == 0x00) && (nTimeout < FLASH_TIMEOUT));
+ if (nTimeout >= FLASH_TIMEOUT)
+ status = 0xff00;
+
+ nTimeout = FLASH_TIMEOUT;
+ do {
+ *(volatile unsigned short *)memIndex = 0xff; /* Back to
"read array mode". */
+ SSYNC();
+ nTimeout--;
+ } while ((*(volatile unsigned short *)memIndex
+ != (unsigned short)nValue) && (nTimeout > 0));
+ if (!nTimeout)
+ status = 0xee00;
+
+ SWITCH_BACK;
+
+ if (status == 0x0080)
+ return (ERR_OK);
+ else
+ return (ERR_TIMOUT);
+}
+
+static int erase_block_flash(int nBlock, unsigned long address)
+{
+ unsigned long memIndex;
+ unsigned short status;
+ unsigned long nTimeout;
+ int crossed4 = 0;
+ int crossed5 = 0;
+
+ if ((nBlock < 0) || (nBlock >= CONFIG_SYS_MAX_FLASH_SECT)) {
+ printf("Invalid sector number\n");
+ return -1;
+ }
+
+ memIndex = (unsigned long)(address); /* + CONFIG_SYS_FLASH_BASE); */
+
+ if ( memIndex == 0x20000000 ) {
+
+ SWITCH_BANK;
+
+ for (;(u_long)memIndex < 0x20020000;memIndex+=0x4000) {
+ *(volatile unsigned short *)memIndex = 0x0050;
+ SSYNC();
+
+ *(volatile unsigned short *)memIndex = 0x0020;
+ SSYNC();
+
+ *(volatile unsigned short *)memIndex = 0x00d0;
+ SSYNC();
+
+ nTimeout = 0;
+ do {
+ status = *(volatile unsigned short *)memIndex;
+ SSYNC();
+ nTimeout++;
+ }
+ while (((status & 0x0080) == 0x00) && (nTimeout <
FLASH_TIMEOUT));
+ if (nTimeout >= FLASH_TIMEOUT)
+ status = 0xff00;
+
+ *(volatile unsigned short *)memIndex = 0xff; /* Back
to "Read Array Mode" */
+ SSYNC();
+ }
+
+ } else {
+
+ SWITCH_BANK;
+
+ *(volatile unsigned short *)memIndex = 0x0050;
+ SSYNC();
+
+ *(volatile unsigned short *)memIndex = 0x0020;
+ SSYNC();
+
+ *(volatile unsigned short *)memIndex = 0x00d0;
+ SSYNC();
+
+ nTimeout = 0;
+ do {
+ status = *(volatile unsigned short *)memIndex;
+ SSYNC();
+ nTimeout++;
+ }
+ while (((status & 0x0080) == 0x00) && (nTimeout <
FLASH_TIMEOUT));
+ if (nTimeout >= FLASH_TIMEOUT)
+ status = 0xff00;
+
+ *(volatile unsigned short *)memIndex = 0xff; /* Back to
"Read Array Mode" */
+ SSYNC();
+
+ }
+
+ SWITCH_BACK;
+
+ if (status == 0xFF00)
+ return -1;
+ else
+ return ERR_OK;
+}
+
+int get_codes()
+{
+ int dev_id = 0;
+ long int manufacturer_id;
+ volatile unsigned short *nFlashAddr;
+
+ nFlashAddr = (unsigned short *)CONFIG_SYS_FLASH_BASE;
+
+ *nFlashAddr = 0x0090; /* Read identifier command. */
+ SSYNC();
+
+ manufacturer_id = *nFlashAddr;
+ SSYNC();
+ nFlashAddr++;
+ dev_id = *nFlashAddr;
+ SSYNC();
+
+ *nFlashAddr = 0x00ff; /* Return to read array mode. */
+ SSYNC();
+
+ dev_id = ((manufacturer_id << 16) | dev_id);
+ return dev_id;
+}
+
+int do_ph9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ ushort data;
+ ulong dflg;
+
+ if (argc > 1) {
+ dflg = simple_strtoul(argv[1], NULL, 16);
+ if (dflg > 0) {
+ *pPORTHIO_SET = PH9;
+ } else {
+ *pPORTHIO_CLEAR = PH9;
+ }
+ } else {
+ data = *pPORTHIO;
+ printf(" PH9 command argc = %d data %04x\n", argc, data);
+ }
+ return 0;
+}
+
+U_BOOT_CMD(ph9, CONFIG_SYS_MAXARGS, 1, do_ph9,
+ "ph9\t- set/clear ph9 mem bank switch\n",
+ "\nph9 1 ...\n" "ph9 0 ...\n");
+
+int do_pg11(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ ushort data;
+ ulong dflg;
+
+ if (argc > 1) {
+ dflg = simple_strtoul(argv[1], NULL, 16);
+ if (dflg > 0) {
+ *pPORTGIO_SET = PG11;
+ } else {
+ *pPORTGIO_CLEAR = PG11;
+ }
+ } else {
+ data = *pPORTGIO;
+ printf(" PG11 command argc = %d data %04x\n", argc, data);
+ }
+ return 0;
+}
+
+U_BOOT_CMD(pg11, CONFIG_SYS_MAXARGS, 1, do_pg11,
+ "pg11\t- set/clear pg11 mem bank switch\n",
+ "\npg11 1 ...\n" "pg11 0 ...\n");
+
+int do_readflash(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ unsigned long src;
+ unsigned long dest;
+ int size;
+
+ if (argc == 4) {
+ src = simple_strtoul(argv[1], NULL, 16);
+ dest = simple_strtoul(argv[2], NULL, 16);
+ size = simple_strtol(argv[3], NULL, 16);
+ if (src < CONFIG_SYS_FLASH_BASE ||
+ (src + size) > CONFIG_SYS_FLASH_BASE +
CONFIG_SYS_FLASH_SIZE) {
+ printf("Error: Memory area %#08lx to %#08lx is not in
flash.\n",
+ src, src + size);
+ return 1;
+ }
+ if (dest < CONFIG_SYS_SDRAM_BASE ||
+ (dest + size) > CONFIG_SYS_SDRAM_BASE +
CONFIG_SYS_MAX_RAM_SIZE) {
+ printf("Error: Memory area %#08lx to %#08lx is not in
RAM.\n",
+ dest, dest + size);
+ return 1;
+ }
+ read_flash((char *)src, size, (char *)dest);
+ printf("Done.\n");
+ } else
+ printf("Error: Arguments missing.\n");
+
+ return 0;
+}
+
+U_BOOT_CMD(flread, 4, 0, do_readflash,
+ "flread - read from flash\n",
+ "reads flash memory and handles ph9/pg11 bank switching\n\n"
+ "readflash addr dest length\n"
+ " (all arguments in hex)\n");
diff --git a/board/cm-bf527/gpio.c b/board/cm-bf527/gpio.c
new file mode 100644
index 0000000..dcf641b
--- /dev/null
+++ b/board/cm-bf527/gpio.c
@@ -0,0 +1,74 @@
+/*
+ * Control GPIO pins on the fly
+ *
+ * Copyright (c) 2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <command.h>
+
+#include <asm/blackfin.h>
+
+int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ if (argc != 3) {
+ show_usage:
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ /* parse the behavior */
+ ulong port_cmd = 0;
+ switch (argv[1][0]) {
+ case 'i': break;
+ case 's': port_cmd = (PORTFIO_SET - PORTFIO); break;
+ case 'c': port_cmd = (PORTFIO_CLEAR - PORTFIO); break;
+ case 't': port_cmd = (PORTFIO_TOGGLE - PORTFIO); break;
+ default: goto show_usage;
+ }
+
+ /* parse the pin with format: [p]<fgh><#> */
+ const char *str_pin = argv[2];
+
+ /* grab the [p]<fgh> portion */
+ ulong port_base;
+ if (*str_pin == 'p') ++str_pin;
+ switch (*str_pin) {
+ case 'f': port_base = PORTFIO; break;
+ case 'g': port_base = PORTGIO; break;
+ case 'h': port_base = PORTHIO; break;
+ default: goto show_usage;
+ }
+
+ /* grab the <#> portion */
+ ulong pin = simple_strtoul(str_pin+1, NULL, 10);
+ ulong pin_mask = (1 << pin);
+ if (pin > 15)
+ goto show_usage;
+
+ /* finally, let's do it: set direction and exec command */
+ switch (*str_pin) {
+ case 'f': bfin_write_PORTF_FER(bfin_read_PORTF_FER() &
~pin_mask); break;
+ case 'g': bfin_write_PORTG_FER(bfin_read_PORTG_FER() &
~pin_mask); break;
+ case 'h': bfin_write_PORTH_FER(bfin_read_PORTH_FER() &
~pin_mask); break;
+ }
+
+ ulong port_dir = port_base + (PORTFIO_DIR - PORTFIO);
+ if (argv[1][0] == 'i')
+ bfin_write16(port_dir, bfin_read16(port_dir) & ~pin_mask);
+ else {
+ bfin_write16(port_dir, bfin_read16(port_dir) | pin_mask);
+ bfin_write16(port_base + port_cmd, pin_mask);
+ }
+
+ printf("gpio: pin %li on port %c has been %c\n", pin, *str_pin,
argv[1][0]);
+
+ return 0;
+}
+
+U_BOOT_CMD(gpio, 3, 0, do_gpio,
+ "gpio - set/clear/toggle gpio output pins\n",
+ "<s|c|t> <port><pin>\n"
+ " - set/clear/toggle the specified pin\n");
diff --git a/board/cm-bf527/nand.c b/board/cm-bf527/nand.c
new file mode 100644
index 0000000..bce563e
--- /dev/null
+++ b/board/cm-bf527/nand.c
@@ -0,0 +1,2 @@
+/* Share the nand driver */
+#include "../bf548-ezkit/nand.c"
diff --git a/board/cm-bf527/spi_flash.c b/board/cm-bf527/spi_flash.c
new file mode 100644
index 0000000..8784741
--- /dev/null
+++ b/board/cm-bf527/spi_flash.c
@@ -0,0 +1,2 @@
+/* Share the spi flash code */
+#include "../bf537-stamp/spi_flash.c"
diff --git a/board/cm-bf527/u-boot.lds.S b/board/cm-bf527/u-boot.lds.S
new file mode 100644
index 0000000..3e8be35
--- /dev/null
+++ b/board/cm-bf527/u-boot.lds.S
@@ -0,0 +1,124 @@
+/*
+ * U-boot - u-boot.lds.S
+ *
+ * Copyright (c) 2005-2008 Analog Device Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <asm/blackfin.h>
+#undef ALIGN
+#undef ENTRY
+#undef bfin
+
+/* If we don't actually load anything into L1 data, this will avoid
+ * a syntax error. If we do actually load something into L1 data,
+ * we'll get a linker memory load error (which is what we'd want).
+ * This is here in the first place so we can quickly test building
+ * for different CPU's which may lack non-cache L1 data.
+ */
+#ifndef L1_DATA_B_SRAM
+# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
+# define L1_DATA_B_SRAM_SIZE 0
+#endif
+
+OUTPUT_ARCH(bfin)
+
+MEMORY
+{
+ ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH =
CONFIG_SYS_MONITOR_LEN
+ l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
+ l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
+}
+
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ cpu/blackfin/start.o (.text .text.*)
+ __initcode_start = .;
+ cpu/blackfin/initcode.o (.text .text.*)
+ __initcode_end = .;
+ *(.text .text.*)
+ } >ram
+
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata .rodata.*)
+ *(.rodata1)
+ *(.eh_frame)
+ . = ALIGN(4);
+ } >ram
+
+ .data :
+ {
+ . = ALIGN(256);
+ *(.data .data.*)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ } >ram
+
+ .u_boot_cmd :
+ {
+ ___u_boot_cmd_start = .;
+ *(.u_boot_cmd)
+ ___u_boot_cmd_end = .;
+ } >ram
+
+ .text_l1 :
+ {
+ . = ALIGN(4);
+ __stext_l1 = .;
+ *(.l1.text)
+ . = ALIGN(4);
+ __etext_l1 = .;
+ } >l1_code AT>ram
+ __stext_l1_lma = LOADADDR(.text_l1);
+
+ .data_l1 :
+ {
+ . = ALIGN(4);
+ __sdata_l1 = .;
+ *(.l1.data)
+ *(.l1.bss)
+ . = ALIGN(4);
+ __edata_l1 = .;
+ } >l1_data AT>ram
+ __sdata_l1_lma = LOADADDR(.data_l1);
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss .bss.*)
+ *(COMMON)
+ __bss_end = .;
+ } >ram
+}
diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h
new file mode 100644
index 0000000..65c976c
--- /dev/null
+++ b/include/configs/cm-bf527.h
@@ -0,0 +1,144 @@
+/*
+ * U-boot - Configuration file for CM-BF527 board
+ */
+
+#ifndef __CONFIG_CM_BF527_H__
+#define __CONFIG_CM_BF527_H__
+
+#include <asm/blackfin-config-pre.h>
+
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU bf527-0.0
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
+
+
+/*
+ * Clock Settings
+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 25000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
+/* 1 = CLKIN / 2
*/
+#define CONFIG_CLKIN_HALF 0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
+/* 1 = bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
+/* Values can range from 0-63 (where 0 means 64) */
+#define CONFIG_VCO_MULT 21
+/* CCLK_DIV controls the core clock divider */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* SCLK_DIV controls the system clock divider */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 4
+
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_ADD_WDTH 9
+#define CONFIG_MEM_SIZE 32
+
+#define CONFIG_EBIU_SDRRC_VAL 0x3f8
+#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
+
+#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
+#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 |
B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
+#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 |
B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
+
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
+
+
+/*
+ * NAND Settings
+ * (can't be used sametime as ethernet)
+ */
+/* #define CONFIG_BFIN_NFC */
+#ifdef CONFIG_BFIN_NFC
+#define CONFIG_BFIN_NFC_CTL_VAL 0x0033
+#define CONFIG_SYS_NAND_BASE 0 /* not actually used */
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_CMD_NAND
+#endif
+
+
+/*
+ * Network Settings
+ */
+#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
+ !defined(__ADSPBF524__) && !defined(__ADSPBF525__) &&
!defined(CONFIG_BFIN_NFC)
+#define ADI_CMDS_NETWORK 1
+#define CONFIG_BFIN_MAC
+#define CONFIG_RMII
+#define CONFIG_NETCONSOLE 1
+#define CONFIG_NET_MULTI 1
+#endif
+#define CONFIG_HOSTNAME cm-bf527
+/* Uncomment next line to use fixed MAC address */
+/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
+
+
+/*
+ * Flash Settings
+ */
+#define CONFIG_SYS_FLASH_BASE 0x20000000
+#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
+#define FLASH_TOT_SECT 64
+#define CONFIG_SYS_FLASH_SIZE 0x800000
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 64
+
+#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
+#define CONFIG_ENV_IS_IN_EEPROM 1
+#define CONFIG_ENV_OFFSET 0x4000
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
+#else
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR 0x20008000
+#define CONFIG_ENV_OFFSET 0x8000
+#define CONFIG_ENV_SIZE 0x8000
+#endif
+#define ENV_IS_EMBEDDED_CUSTOM
+
+/* CONFIG_SPI_BAUD controls the SPI peripheral clock divider */
+/* Values can range from 2-65535 */
+/* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD)
*/
+#define CONFIG_SPI
+#define CONFIG_SPI_BAUD 2
+#define CONFIG_SYS_I2C_FRAM
+
+
+/*
+ * I2C Settings
+ */
+#define CONFIG_BFIN_TWI_I2C 1
+#define CONFIG_HARD_I2C 1
+#define CONFIG_SYS_I2C_SPEED 50000
+#define CONFIG_SYS_I2C_SLAVE 0
+
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_RTC_BFIN
+#define CONFIG_UART_CONSOLE 0
+
+
+/*
+ * Pull in common ADI header for remaining command/environment setup
+ */
+#include <configs/bfin_adi_common.h>
+
+#include <asm/blackfin-config-post.h>
+
+#endif
--
1.6.1.2
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