Rather than having the on-chip MAC hardcoded to phy address 1 and a speed
of 2.5mhz, use these ase defaults if the board doesn't specify otherwise.
Signed-off-by: Mike Frysinger <vap...@gentoo.org>
CC: Ben Warren <biggerbadder...@gmail.com>
---
drivers/net/bfin_mac.c | 15 +++++++++++----
drivers/net/bfin_mac.h | 1 -
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
index 4b930db..b875937 100644
--- a/drivers/net/bfin_mac.c
+++ b/drivers/net/bfin_mac.c
@@ -22,6 +22,13 @@
#include "bfin_mac.h"
+#ifndef CONFIG_PHY_ADDR
+# define CONFIG_PHY_ADDR 1
+#endif
+#ifndef CONFIG_PHY_CLOCK_FREQ
+# define CONFIG_PHY_CLOCK_FREQ 2500000
+#endif
+
#ifdef CONFIG_POST
#include <post.h>
#endif
@@ -287,14 +294,14 @@ static int bfin_miiphy_init(struct eth_device *dev, int
*opmode)
/* Odd word alignment for Receive Frame DMA word */
/* Configure checksum support and rcve frame word alignment */
- bfin_write_EMAC_SYSCTL(RXDWA | RXCKS |
SET_MDCDIV(MDC_FREQ_TO_DIV(2500000)));
+ bfin_write_EMAC_SYSCTL(RXDWA | RXCKS |
SET_MDCDIV(MDC_FREQ_TO_DIV(CONFIG_PHY_CLOCK_FREQ)));
/* turn on auto-negotiation and wait for link to come up */
- bfin_miiphy_write(dev->name, PHYADDR, MII_BMCR, BMCR_ANENABLE);
+ bfin_miiphy_write(dev->name, CONFIG_PHY_ADDR, MII_BMCR, BMCR_ANENABLE);
count = 0;
while (1) {
++count;
- if (bfin_miiphy_read(dev->name, PHYADDR, MII_BMSR, &phydat))
+ if (bfin_miiphy_read(dev->name, CONFIG_PHY_ADDR, MII_BMSR,
&phydat))
return -1;
if (phydat & BMSR_LSTATUS)
break;
@@ -306,7 +313,7 @@ static int bfin_miiphy_init(struct eth_device *dev, int
*opmode)
}
/* see what kind of link we have */
- if (bfin_miiphy_read(dev->name, PHYADDR, MII_LPA, &phydat))
+ if (bfin_miiphy_read(dev->name, CONFIG_PHY_ADDR, MII_LPA, &phydat))
return -1;
if (phydat & LPA_DUPLEX)
*opmode = FDMODE;
diff --git a/drivers/net/bfin_mac.h b/drivers/net/bfin_mac.h
index c41b4d4..b1623e0 100644
--- a/drivers/net/bfin_mac.h
+++ b/drivers/net/bfin_mac.h
@@ -9,7 +9,6 @@
#ifndef __BFIN_MAC_H__
#define __BFIN_MAC_H__
-#define PHYADDR 0x01
#define RECV_BUFSIZE (0x614)
typedef struct ADI_DMA_CONFIG_REG {
--
1.6.1.1
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