Hi,
this patch adds support for Toradex' "Colibri PXA300" module. I had to
modify the AX88796 driver a bit to make it work, but that goes in a
different patch.
Also, the board code does not support NAND yet. I'll implement the code
from Oliver Ford soon.
Signed-off-by: Daniel Mack <[EMAIL PROTECTED]>
diff --git a/MAKEALL b/MAKEALL
index dbed268..868205f 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -554,6 +554,7 @@ LIST_at91=" \
LIST_pxa=" \
cerf250 \
+ colibri_pxa300 \
cradle \
csb226 \
delta \
diff --git a/Makefile b/Makefile
index befb608..ee94d17 100644
--- a/Makefile
+++ b/Makefile
@@ -2804,6 +2804,9 @@ actux4_config : unconfig
cerf250_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa cerf250
+colibri_pxa300_config: unconfig
+ @$(MKCONFIG) $(@:_config=) arm pxa colibri_pxa300
+
cradle_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa cradle
diff --git a/board/colibri_pxa300/Makefile b/board/colibri_pxa300/Makefile
new file mode 100644
index 0000000..2fa3fb9
--- /dev/null
+++ b/board/colibri_pxa300/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := colibri_pxa300.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/colibri_pxa300/colibri_pxa300.c
b/board/colibri_pxa300/colibri_pxa300.c
new file mode 100644
index 0000000..2c2b0d7
--- /dev/null
+++ b/board/colibri_pxa300/colibri_pxa300.c
@@ -0,0 +1,61 @@
+/*
+ * (C) Copyright 2008
+ * Daniel Mack, caiaq GbR <[EMAIL PROTECTED]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init (void)
+{
+ /* arch number for linux kernel */
+ gd->bd->bi_arch_number = MACH_TYPE_COLIBRI300;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0xa0000100;
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+ setenv("stdout", "serial");
+ setenv("stderr", "serial");
+ return 0;
+}
+
+int dram_init (void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
+ return 0;
+}
diff --git a/board/colibri_pxa300/config.mk b/board/colibri_pxa300/config.mk
new file mode 100644
index 0000000..350ff3d
--- /dev/null
+++ b/board/colibri_pxa300/config.mk
@@ -0,0 +1,2 @@
+TEXT_BASE = 0x81000000
+
diff --git a/board/colibri_pxa300/lowlevel_init.S
b/board/colibri_pxa300/lowlevel_init.S
new file mode 100644
index 0000000..23155ab
--- /dev/null
+++ b/board/colibri_pxa300/lowlevel_init.S
@@ -0,0 +1,97 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/pxa-regs.h>
+
+/* There is no memory init here since U-Boot was booted from DRAM
+ already. You need to implement a first-stage bootloader to setup
+ the RAM controller and load contents from NAND if needed. */
+
+.globl lowlevel_init
+lowlevel_init:
+
+ /* Configure GPIO pins for UART1 / altFn 1 */
+ ldr r0, =0x40E10600 @ GPIO99 FFRXD
+ ldr r1, =0x801
+ str r1, [r0]
+
+ ldr r0, =0x40E10604 @ GPIO100 FFTXD
+ ldr r1, =0x801
+ str r1, [r0]
+
+ ldr r0, =0x40E10608 @ GPIO101 FFCTS
+ ldr r1, =0x801
+ str r1, [r0]
+
+ ldr r0, =0x40E10630 @ GPIO111 FFRTS
+ ldr r1, =0x801
+ str r1, [r0]
+
+ ldr r0, =0x40E10610 @ GPIO103 FFDTR
+ ldr r1, =0x801
+ str r1, [r0]
+
+ ldr r0, =0x40E10618 @ GPIO105 FFDSR
+ ldr r1, =0x801
+ str r1, [r0]
+
+ ldr r0, =0x40E1060c @ GPIO102 FFDCD
+ ldr r1, =0x801
+ str r1, [r0]
+
+ ldr r0, =0x40E10614 @ GPIO104 FFRI
+ ldr r1, =0x801
+ str r1, [r0]
+
+ /* CS2 @GPIO1 */
+ ldr r0, =0x40E100b8
+ ldr r1, =0x1
+ str r1, [r0]
+
+ /* configure SRAM controller for ethernet chip */
+
+ /* MSC1: SRAM, 16bit */
+ ldr r0, =MSC1
+ ldr r1, =0x00000779
+ str r1, [r0]
+
+ /* SXCNFG: enable CS2 for static memory */
+ ldr r0, =SXCNFG
+ ldr r1, =0x00880008
+ str r1, [r0]
+
+ /* MEMCLKCFG: set clock speed for SRAM */
+ ldr r0, =MEMCLKCFG
+ ldr r1, =0x00030003
+ str r1, [r0]
+
+ /* CSADRCFG2: interface type 'SRAM / async flash',
+ byte address split 16 */
+ ldr r0, =CSADRCFG2
+ ldr r1, =0x0032C809
+ str r1, [r0]
+
+ /* enable clocks for NAND and static memory */
+ ldr r0, =CKENA
+ ldr r1, [r0]
+ orr r1, r1, #(CKENA_4_NAND | CKENA_9_SMC)
+ str r1, [r0]
+
+ mov pc, lr
+
diff --git a/board/colibri_pxa300/u-boot.lds b/board/colibri_pxa300/u-boot.lds
new file mode 100644
index 0000000..7cf9fdf
--- /dev/null
+++ b/board/colibri_pxa300/u-boot.lds
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/pxa/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
+ _end = .;
+}
diff --git a/include/configs/colibri_pxa300.h b/include/configs/colibri_pxa300.h
new file mode 100644
index 0000000..f589337
--- /dev/null
+++ b/include/configs/colibri_pxa300.h
@@ -0,0 +1,173 @@
+/*
+ * (C) Copyright 2008
+ * Daniel Mack <[EMAIL PROTECTED]>
+ *
+ * Based on configuation settings for the Zylonite board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_CPU_MONAHANS 1 /* Intel Monahans CPU */
+#define CONFIG_COLIBRI_PXA300 1 /* Colibri PXA300 board */
+
+#undef BOARD_LATE_INIT
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+#undef CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_SKIP_DRAM_SCRUB
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_NOWHERE 1
+#define CONFIG_ENV_OFFSET 0x40000
+#define CONFIG_ENV_OFFSET_REDUND 0x44000
+#define CONFIG_ENV_SIZE 0x4000
+
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for
initial data */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_FFUART 1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_BAUDRATE 115200
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ENV
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_BOOTDELAY -1
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.1.52
+#define CONFIG_SERVERIP 192.168.1.51
+#define CONFIG_BOOTCOMMAND "bootm 80000"
+#define CONFIG_BOOTARGS "console=ttyS0,115200"
+#define CONFIG_TIMESTAMP
+#define CONFIG_EXTRA_ENV_SETTINGS "ethaddr=08:00:3e:26:0a:5b"
+
+/*
+ * Kernel boot tags
+ */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial
port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Hardware drivers
+ */
+#if defined(CONFIG_CMD_NET)
+/* AX88696L Support(NE2000 base chip) */
+#define CONFIG_DRIVER_AX88796L
+#define CONFIG_DRIVER_NE2000_BASE 0x10000000
+#define CONFIG_NE2000_NOPROM
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_HUSH_PARSER 1
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+#define CONFIG_SYS_LONGHELP /* undef to save memory
*/
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT "$ " /* Monitor Command
Prompt */
+#else
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command
Prompt */
+#endif
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer
Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /*
Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of
command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot
Argument Buffer Size */
+#define CONFIG_SYS_DEVICE_NULLDEV 1
+
+#define CONFIG_SYS_MEMTEST_START 0x80200000 /* memtest works on
*/
+#define CONFIG_SYS_MEMTEST_END 0x80400000 /* 4 ... 8 MB in DRAM
*/
+
+#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CONFIG_SYS_HZ 3250000 /* incrementer freq:
3.25 MHz */
+
+/* Monahans Core Frequency */
+#define CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO 8 /* valid values: 8,
16, 24, 31 */
+#define CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2
*/
+
+ /* valid baudrates */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
+#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
+#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
+#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
+
+#define CONFIG_SYS_DRAM_BASE 0xa0200000 /* at CS0 */
+#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB Ram */
+
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /*
default load address */
+#define CONFIG_SYS_NO_FLASH 1
+
+#endif /* __CONFIG_H */
+
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