I did several tests for my b'd that has CFI Nor erase/write problem.
My main problem is that flash_toggle() function doesn't work properly,
it always returns 0 even while bus writing operation is proceeding.
I mean, toggle bit doesn't toggle for each read operation. (refer to
drivers/mtd/cfi_flash.c)
I found two workarounds.
First, small waiting between each read. So, following code doesn't work.
<SNIP>
retval = flash_read16(addr) != flash_read16(addr);
<SNIP>
But, following code does work.
<SNIP>
u16 d = flash_read16(addr);
udelay(1);
u16 t = flash_read16(addr);
retval = d != t;
<SNIP>
I tried to increase read wait cycle to maximum which my chip allows, but
has no effect. Only waiting small period between each read can solve the
problem.
Second workaround, I defined slightly modified version of
flash_read_word() functions like following:
<SNIP>
static inline ushort flash_read_one_word (flash_info_t * info,
flash_sect_t sect, uint offset)
{
ushort *addr, retval;
addr = flash_map (info, sect, offset);
retval = flash_read16 (addr);
flash_unmap (info, sect, offset, addr);
return retval;
}
<SNIP>
And flash_toggle() function is changed like this:
<SNIP>
retval = flash_read_one_word(info, sect, offset) !=
flash_read_one_word(info, sect, offset);
<SNIP>
This trick works perfectly on my board, without any delay.
I don't know exactly that this is caused by specific bus access
mechanism, or simply chip silicon bug.
flash_read_uchar(), flash_read_word() can be modified to get another
parameter for sector. (flash_read_long() already gets sector)
And, flash_read_long_long() function may needs to be defined.
What do you think about this? Is there any side effect between each
platform?
Regards,
Choe, Hyun-ho
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